diff options
Diffstat (limited to 'include/asm-sh/cpu-sh4/dma.h')
| -rw-r--r-- | include/asm-sh/cpu-sh4/dma.h | 52 |
1 files changed, 42 insertions, 10 deletions
diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h index e2b91adf821..0dfe61f1480 100644 --- a/include/asm-sh/cpu-sh4/dma.h +++ b/include/asm-sh/cpu-sh4/dma.h @@ -1,17 +1,49 @@ #ifndef __ASM_CPU_SH4_DMA_H #define __ASM_CPU_SH4_DMA_H +#ifdef CONFIG_CPU_SH4A +#define SH_DMAC_BASE 0xfc808020 +#else #define SH_DMAC_BASE 0xffa00000 +#endif -#define SAR ((unsigned long[]){SH_DMAC_BASE + 0x00, SH_DMAC_BASE + 0x10, \ - SH_DMAC_BASE + 0x20, SH_DMAC_BASE + 0x30}) -#define DAR ((unsigned long[]){SH_DMAC_BASE + 0x04, SH_DMAC_BASE + 0x14, \ - SH_DMAC_BASE + 0x24, SH_DMAC_BASE + 0x34}) -#define DMATCR ((unsigned long[]){SH_DMAC_BASE + 0x08, SH_DMAC_BASE + 0x18, \ - SH_DMAC_BASE + 0x28, SH_DMAC_BASE + 0x38}) -#define CHCR ((unsigned long[]){SH_DMAC_BASE + 0x0c, SH_DMAC_BASE + 0x1c, \ - SH_DMAC_BASE + 0x2c, SH_DMAC_BASE + 0x3c}) -#define DMAOR (SH_DMAC_BASE + 0x40) +/* Definitions for the SuperH DMAC */ +#define TM_BURST 0x0000080 +#define TS_8 0x00000010 +#define TS_16 0x00000020 +#define TS_32 0x00000030 +#define TS_64 0x00000000 -#endif /* __ASM_CPU_SH4_DMA_H */ +#define CHCR_TS_MASK 0x30 +#define CHCR_TS_SHIFT 4 + +#define DMAOR_COD 0x00000008 + +#define DMAOR_INIT ( 0x8000 | DMAOR_DME ) +/* + * The SuperH DMAC supports a number of transmit sizes, we list them here, + * with their respective values as they appear in the CHCR registers. + * + * Defaults to a 64-bit transfer size. + */ +enum { + XMIT_SZ_64BIT, + XMIT_SZ_8BIT, + XMIT_SZ_16BIT, + XMIT_SZ_32BIT, + XMIT_SZ_256BIT, +}; + +/* + * The DMA count is defined as the number of bytes to transfer. + */ +static unsigned int ts_shift[] __attribute__ ((used)) = { + [XMIT_SZ_64BIT] = 3, + [XMIT_SZ_8BIT] = 0, + [XMIT_SZ_16BIT] = 1, + [XMIT_SZ_32BIT] = 2, + [XMIT_SZ_256BIT] = 5, +}; + +#endif /* __ASM_CPU_SH4_DMA_H */ |