diff options
Diffstat (limited to 'include/asm-x86')
| -rw-r--r-- | include/asm-x86/cmpxchg_32.h | 32 | ||||
| -rw-r--r-- | include/asm-x86/e820_32.h | 2 | ||||
| -rw-r--r-- | include/asm-x86/e820_64.h | 2 | ||||
| -rw-r--r-- | include/asm-x86/io_32.h | 6 | ||||
| -rw-r--r-- | include/asm-x86/io_64.h | 6 | ||||
| -rw-r--r-- | include/asm-x86/page.h | 4 | ||||
| -rw-r--r-- | include/asm-x86/sync_bitops.h | 9 |
7 files changed, 33 insertions, 28 deletions
diff --git a/include/asm-x86/cmpxchg_32.h b/include/asm-x86/cmpxchg_32.h index cea1dae288a..959fad00dff 100644 --- a/include/asm-x86/cmpxchg_32.h +++ b/include/asm-x86/cmpxchg_32.h @@ -269,22 +269,26 @@ static inline unsigned long cmpxchg_386(volatile void *ptr, unsigned long old, ({ \ __typeof__(*(ptr)) __ret; \ if (likely(boot_cpu_data.x86 > 3)) \ - __ret = __cmpxchg((ptr), (unsigned long)(o), \ - (unsigned long)(n), sizeof(*(ptr))); \ + __ret = (__typeof__(*(ptr)))__cmpxchg((ptr), \ + (unsigned long)(o), (unsigned long)(n), \ + sizeof(*(ptr))); \ else \ - __ret = cmpxchg_386((ptr), (unsigned long)(o), \ - (unsigned long)(n), sizeof(*(ptr))); \ + __ret = (__typeof__(*(ptr)))cmpxchg_386((ptr), \ + (unsigned long)(o), (unsigned long)(n), \ + sizeof(*(ptr))); \ __ret; \ }) #define cmpxchg_local(ptr, o, n) \ ({ \ __typeof__(*(ptr)) __ret; \ if (likely(boot_cpu_data.x86 > 3)) \ - __ret = __cmpxchg_local((ptr), (unsigned long)(o), \ - (unsigned long)(n), sizeof(*(ptr))); \ + __ret = (__typeof__(*(ptr)))__cmpxchg_local((ptr), \ + (unsigned long)(o), (unsigned long)(n), \ + sizeof(*(ptr))); \ else \ - __ret = cmpxchg_386((ptr), (unsigned long)(o), \ - (unsigned long)(n), sizeof(*(ptr))); \ + __ret = (__typeof__(*(ptr)))cmpxchg_386((ptr), \ + (unsigned long)(o), (unsigned long)(n), \ + sizeof(*(ptr))); \ __ret; \ }) #endif @@ -301,10 +305,12 @@ extern unsigned long long cmpxchg_486_u64(volatile void *, u64, u64); ({ \ __typeof__(*(ptr)) __ret; \ if (likely(boot_cpu_data.x86 > 4)) \ - __ret = __cmpxchg64((ptr), (unsigned long long)(o), \ + __ret = (__typeof__(*(ptr)))__cmpxchg64((ptr), \ + (unsigned long long)(o), \ (unsigned long long)(n)); \ else \ - __ret = cmpxchg_486_u64((ptr), (unsigned long long)(o), \ + __ret = (__typeof__(*(ptr)))cmpxchg_486_u64((ptr), \ + (unsigned long long)(o), \ (unsigned long long)(n)); \ __ret; \ }) @@ -312,10 +318,12 @@ extern unsigned long long cmpxchg_486_u64(volatile void *, u64, u64); ({ \ __typeof__(*(ptr)) __ret; \ if (likely(boot_cpu_data.x86 > 4)) \ - __ret = __cmpxchg64_local((ptr), (unsigned long long)(o), \ + __ret = (__typeof__(*(ptr)))__cmpxchg64_local((ptr), \ + (unsigned long long)(o), \ (unsigned long long)(n)); \ else \ - __ret = cmpxchg_486_u64((ptr), (unsigned long long)(o), \ + __ret = (__typeof__(*(ptr)))cmpxchg_486_u64((ptr), \ + (unsigned long long)(o), \ (unsigned long long)(n)); \ __ret; \ }) diff --git a/include/asm-x86/e820_32.h b/include/asm-x86/e820_32.h index f1da7ebd190..e7207a6de3e 100644 --- a/include/asm-x86/e820_32.h +++ b/include/asm-x86/e820_32.h @@ -28,6 +28,8 @@ extern void find_max_pfn(void); extern void register_bootmem_low_pages(unsigned long max_low_pfn); extern void add_memory_region(unsigned long long start, unsigned long long size, int type); +extern void update_memory_range(u64 start, u64 size, unsigned old_type, + unsigned new_type); extern void e820_register_memory(void); extern void limit_regions(unsigned long long size); extern void print_memory_map(char *who); diff --git a/include/asm-x86/e820_64.h b/include/asm-x86/e820_64.h index a560c4f5d50..22ede73ae72 100644 --- a/include/asm-x86/e820_64.h +++ b/include/asm-x86/e820_64.h @@ -18,6 +18,8 @@ extern unsigned long find_e820_area(unsigned long start, unsigned long end, unsigned size, unsigned long align); extern void add_memory_region(unsigned long start, unsigned long size, int type); +extern void update_memory_range(u64 start, u64 size, unsigned old_type, + unsigned new_type); extern void setup_memory_region(void); extern void contig_e820_setup(void); extern unsigned long e820_end_of_ram(void); diff --git a/include/asm-x86/io_32.h b/include/asm-x86/io_32.h index 58d2c45cd0b..d4d8fbd9378 100644 --- a/include/asm-x86/io_32.h +++ b/include/asm-x86/io_32.h @@ -114,13 +114,13 @@ static inline void * phys_to_virt(unsigned long address) * If the area you are trying to map is a PCI BAR you should have a * look at pci_iomap(). */ -extern void __iomem *ioremap_nocache(unsigned long offset, unsigned long size); -extern void __iomem *ioremap_cache(unsigned long offset, unsigned long size); +extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size); +extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size); /* * The default ioremap() behavior is non-cached: */ -static inline void __iomem *ioremap(unsigned long offset, unsigned long size) +static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) { return ioremap_nocache(offset, size); } diff --git a/include/asm-x86/io_64.h b/include/asm-x86/io_64.h index f64a59cc396..db0be2011a3 100644 --- a/include/asm-x86/io_64.h +++ b/include/asm-x86/io_64.h @@ -158,13 +158,13 @@ extern void early_iounmap(void *addr, unsigned long size); * it's useful if some control registers are in such an area and write combining * or read caching is not desirable: */ -extern void __iomem *ioremap_nocache(unsigned long offset, unsigned long size); -extern void __iomem *ioremap_cache(unsigned long offset, unsigned long size); +extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size); +extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size); /* * The default ioremap() behavior is non-cached: */ -static inline void __iomem *ioremap(unsigned long offset, unsigned long size) +static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) { return ioremap_nocache(offset, size); } diff --git a/include/asm-x86/page.h b/include/asm-x86/page.h index 1cb7c51bc29..a05b2896492 100644 --- a/include/asm-x86/page.h +++ b/include/asm-x86/page.h @@ -52,13 +52,13 @@ extern int page_is_ram(unsigned long pagenr); struct page; -static void inline clear_user_page(void *page, unsigned long vaddr, +static inline void clear_user_page(void *page, unsigned long vaddr, struct page *pg) { clear_page(page); } -static void inline copy_user_page(void *to, void *from, unsigned long vaddr, +static inline void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topage) { copy_page(to, from); diff --git a/include/asm-x86/sync_bitops.h b/include/asm-x86/sync_bitops.h index cbce08a2d13..6b775c90566 100644 --- a/include/asm-x86/sync_bitops.h +++ b/include/asm-x86/sync_bitops.h @@ -23,10 +23,6 @@ * This function is atomic and may not be reordered. See __set_bit() * if you do not require the atomic guarantees. * - * Note: there are no guarantees that this function will not be reordered - * on non-x86 architectures, so if you are writing portable code, - * make sure not to rely on its reordering guarantees. - * * Note that @nr may be almost arbitrarily large; this function is not * restricted to acting on a single-word quantity. */ @@ -61,8 +57,7 @@ static inline void sync_clear_bit(int nr, volatile unsigned long * addr) * @nr: Bit to change * @addr: Address to start counting from * - * change_bit() is atomic and may not be reordered. It may be - * reordered on other architectures than x86. + * sync_change_bit() is atomic and may not be reordered. * Note that @nr may be almost arbitrarily large; this function is not * restricted to acting on a single-word quantity. */ @@ -80,7 +75,6 @@ static inline void sync_change_bit(int nr, volatile unsigned long * addr) * @addr: Address to count from * * This operation is atomic and cannot be reordered. - * It may be reordered on other architectures than x86. * It also implies a memory barrier. */ static inline int sync_test_and_set_bit(int nr, volatile unsigned long * addr) @@ -99,7 +93,6 @@ static inline int sync_test_and_set_bit(int nr, volatile unsigned long * addr) * @addr: Address to count from * * This operation is atomic and cannot be reordered. - * It can be reorderdered on other architectures other than x86. * It also implies a memory barrier. */ static inline int sync_test_and_clear_bit(int nr, volatile unsigned long * addr) |