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-rw-r--r--include/linux/mISDNhw.h10
-rw-r--r--include/linux/mdio.h9
2 files changed, 9 insertions, 10 deletions
diff --git a/include/linux/mISDNhw.h b/include/linux/mISDNhw.h
index ce900f4c245..7f9831da847 100644
--- a/include/linux/mISDNhw.h
+++ b/include/linux/mISDNhw.h
@@ -89,11 +89,6 @@ struct dchannel {
void (*phfunc) (struct dchannel *);
u_int state;
void *l1;
- /* HW access */
- u_char (*read_reg) (void *, u_char);
- void (*write_reg) (void *, u_char, u_char);
- void (*read_fifo) (void *, u_char *, int);
- void (*write_fifo) (void *, u_char *, int);
void *hw;
int slot; /* multiport card channel slot */
struct timer_list timer;
@@ -151,11 +146,6 @@ struct bchannel {
u_long Flags;
struct work_struct workq;
u_int state;
- /* HW access */
- u_char (*read_reg) (void *, u_char);
- void (*write_reg) (void *, u_char, u_char);
- void (*read_fifo) (void *, u_char *, int);
- void (*write_fifo) (void *, u_char *, int);
void *hw;
int slot; /* multiport card channel slot */
struct timer_list timer;
diff --git a/include/linux/mdio.h b/include/linux/mdio.h
index 56851646529..cfdf1df2875 100644
--- a/include/linux/mdio.h
+++ b/include/linux/mdio.h
@@ -45,6 +45,7 @@
#define MDIO_PHYXS_LNSTAT 24 /* PHY XGXS lane state */
/* Media-dependent registers. */
+#define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
#define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
#define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
* Lanes B-D are numbered 134-136. */
@@ -195,6 +196,14 @@
#define MDIO_PHYXS_LNSTAT_SYNC3 0x0008
#define MDIO_PHYXS_LNSTAT_ALIGN 0x1000
+/* PMA 10GBASE-T pair swap & polarity */
+#define MDIO_PMA_10GBT_SWAPPOL_ABNX 0x0001 /* Pair A/B uncrossed */
+#define MDIO_PMA_10GBT_SWAPPOL_CDNX 0x0002 /* Pair C/D uncrossed */
+#define MDIO_PMA_10GBT_SWAPPOL_AREV 0x0100 /* Pair A polarity reversed */
+#define MDIO_PMA_10GBT_SWAPPOL_BREV 0x0200 /* Pair B polarity reversed */
+#define MDIO_PMA_10GBT_SWAPPOL_CREV 0x0400 /* Pair C polarity reversed */
+#define MDIO_PMA_10GBT_SWAPPOL_DREV 0x0800 /* Pair D polarity reversed */
+
/* PMA 10GBASE-T TX power register. */
#define MDIO_PMA_10GBT_TXPWR_SHORT 0x0001 /* Short-reach mode */