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-rw-r--r--include/asm-mips/cpu-info.h1
-rw-r--r--include/asm-mips/lasat/lasatint.h5
-rw-r--r--include/asm-mips/mach-lasat/irq.h13
-rw-r--r--include/asm-mips/timex.h2
4 files changed, 15 insertions, 6 deletions
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h
index 94f1c817236..ed5c02c6afb 100644
--- a/include/asm-mips/cpu-info.h
+++ b/include/asm-mips/cpu-info.h
@@ -54,6 +54,7 @@ struct cpuinfo_mips {
struct cache_desc dcache; /* Primary D or combined I/D cache */
struct cache_desc scache; /* Secondary cache */
struct cache_desc tcache; /* Tertiary/split secondary cache */
+ int srsets; /* Shadow register sets */
#if defined(CONFIG_MIPS_MT_SMTC)
/*
* In the MIPS MT "SMTC" model, each TC is considered
diff --git a/include/asm-mips/lasat/lasatint.h b/include/asm-mips/lasat/lasatint.h
index 581dc45685a..e0d2458b43d 100644
--- a/include/asm-mips/lasat/lasatint.h
+++ b/include/asm-mips/lasat/lasatint.h
@@ -1,11 +1,6 @@
#ifndef __ASM_LASAT_LASATINT_H
#define __ASM_LASAT_LASATINT_H
-#include <linux/irq.h>
-
-#define LASATINT_BASE MIPS_CPU_IRQ_BASE
-#define LASATINT_END (LASATINT_BASE + 16)
-
/* lasat 100 */
#define LASAT_INT_STATUS_REG_100 (KSEG1ADDR(0x1c880000))
#define LASAT_INT_MASK_REG_100 (KSEG1ADDR(0x1c890000))
diff --git a/include/asm-mips/mach-lasat/irq.h b/include/asm-mips/mach-lasat/irq.h
new file mode 100644
index 00000000000..da75f89f372
--- /dev/null
+++ b/include/asm-mips/mach-lasat/irq.h
@@ -0,0 +1,13 @@
+#ifndef _ASM_MACH_LASAT_IRQ_H
+#define _ASM_MACH_LASAT_IRQ_H
+
+#define LASAT_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 0)
+
+#define LASAT_IRQ_BASE 8
+#define LASAT_IRQ_END 23
+
+#define NR_IRQS 24
+
+#include_next <irq.h>
+
+#endif /* _ASM_MACH_LASAT_IRQ_H */
diff --git a/include/asm-mips/timex.h b/include/asm-mips/timex.h
index 5816ad1569d..6529704aa73 100644
--- a/include/asm-mips/timex.h
+++ b/include/asm-mips/timex.h
@@ -35,7 +35,7 @@ typedef unsigned int cycles_t;
static inline cycles_t get_cycles(void)
{
- return read_c0_count();
+ return 0;
}
#endif /* __KERNEL__ */