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2007-07-16KVM: Implement emulation of "pop reg" instruction (opcode 0x58-0x5f)Nitin A Kamble
For use in real mode. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: VMX: Ensure vcpu time stamp counter is monotonousAvi Kivity
If the time stamp counter goes backwards, a guest delay loop can become infinite. This can happen if a vcpu is migrated to another cpu, where the counter has a lower value than the first cpu. Since we're doing an IPI to the first cpu anyway, we can use that to pick up the old tsc, and use that to calculate the adjustment we need to make to the tsc offset. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Initialize the BSP bit in the APIC_BASE msr correctlyAvi Kivity
Needs to be set on vcpu 0 only. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: VMX: Replace memset(<addr>, 0, PAGESIZE) with clear_page(<addr>)Shani Moideen
Signed-off-by: Shani Moideen <shani.moideen@wipro.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: SVM: Replace memset(<addr>, 0, PAGESIZE) with clear_page(<addr>)Shani Moideen
Signed-off-by: Shani Moideen <shani.moideen@wipro.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Flush remote tlbs when reducing shadow pte permissionsAvi Kivity
When a vcpu causes a shadow tlb entry to have reduced permissions, it must also clear the tlb on remote vcpus. We do that by: - setting a bit on the vcpu that requests a tlb flush before the next entry - if the vcpu is currently executing, we send an ipi to make sure it exits before we continue Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Keep an upper bound of initialized vcpusAvi Kivity
That way, we don't need to loop for KVM_MAX_VCPUS for a single vcpu vm. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Emulate hlt on real mode for IntelAvi Kivity
This has two use cases: the bios can't boot from disk, and guest smp bootstrap. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Move duplicate halt handling code into kvm_main.cAvi Kivity
Will soon have a thid user. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Enable guest smpAvi Kivity
As we don't support guest tlb shootdown yet, this is only reliable for real-mode guests. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Fix adding an smp virtual machine to the vm listAvi Kivity
If we add the vm once per vcpu, we corrupt the list if the guest has multiple vcpus. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Fix vcpu freeing for guest smpAvi Kivity
A vcpu can pin up to four mmu shadow pages, which means the freeing loop will never terminate. Fix by first unpinning shadow pages on all vcpus, then freeing shadow pages. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Remove unnecessary initialization and checks in mark_page_dirty()Nguyen Anh Quynh
Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Replace C code with call to ARRAY_SIZE() macro.Robert P. J. Day
Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Lazy guest cr3 switchingAvi Kivity
Switch guest paging context may require us to allocate memory, which might fail. Instead of wiring up error paths everywhere, make context switching lazy and actually do the switch before the next guest entry, where we can return an error if allocation fails. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Remove unused large page markerAvi Kivity
This has not been used for some time, as the same information is available in the page header. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Don't cache guest access bits in the shadow page tableAvi Kivity
This was once used to avoid accessing the guest pte when upgrading the shadow pte from read-only to read-write. But usually we need to set the guest pte dirty or accessed bits anyway, so this wasn't really exploited. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Simpify accessed/dirty/present/nx bit handlingAvi Kivity
Always set the accessed and dirty bit (since having them cleared causes a read-modify-write cycle), always set the present bit, and copy the nx bit from the guest. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Remove cr0.wp tricksAvi Kivity
No longer needed as we do everything in one place. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Make setting shadow ptes atomic on i386Avi Kivity
Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Make shadow pte updates atomicAvi Kivity
With guest smp, a second vcpu might see partial updates when the first vcpu services a page fault. So delay all updates until we have figured out what the pte should look like. Note that on i386, this is still not completely atomic as a 64-bit write will be split into two on a 32-bit machine. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Move shadow pte modifications from set_pte/set_pde to set_pde_common()Avi Kivity
We want all shadow pte modifications in one place. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Fold fix_write_pf() into set_pte_common()Avi Kivity
This prevents some work from being performed twice, and, more importantly, reduces the number of places where we modify shadow ptes. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Fold fix_read_pf() into set_pte_common()Avi Kivity
Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Pass the guest pde to set_pte_commonAvi Kivity
We will need the accessed bit (in addition to the dirty bit) and also write access (for setting the dirty bit) in a future patch. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Move set_pte_common() to pte width dependent codeAvi Kivity
In preparation of some modifications. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Simplify fetch() a little bitAvi Kivity
Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Use slab caches for shadow pages and their headersAvi Kivity
Use slab caches instead of a simple custom list. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Use symbolic constants instead of magic numbersEddie Dong
Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Fix includesMarkus Rechberger
KVM compilation fails for some .configs. This fixes it. Signed-off-by: Markus Rechberger <markus.rechberger@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: x86 emulator: implement wbinvdAvi Kivity
Vista seems to trigger it. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16Use menuconfig objects II - KVM/VirtJan Engelhardt
Make a "menuconfig" out of the Kconfig objects "menu, ..., endmenu", so that the user can disable all the options in that menu at once instead of having to disable each option separately. Signed-off-by: Jan Engelhardt <jengelh@gmx.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: VMX: Avoid saving and restoring msr_efer on lightweight vmexitEddie Dong
MSR_EFER.LME/LMA bits are automatically save/restored by VMX hardware, KVM only needs to save NX/SCE bits at time of heavy weight VM Exit. But clearing NX bits in host envirnment may cause system hang if the host page table is using EXB bits, thus we leave NX bits as it is. If Host NX=1 and guest NX=0, we can do guest page table EXB bits check before inserting a shadow pte (though no guest is expecting to see this kind of gp fault). If host NX=0, we present guest no Execute-Disable feature to guest, thus no host NX=0, guest NX=1 combination. This patch reduces raw vmexit time by ~27%. Me: fix compile warnings on i386. Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: VMX: Cleanup redundant code in MSR setEddie Dong
Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: VMX: Avoid saving and restoring msrs on lightweight vmexitEddie Dong
In a lightweight exit (where we exit and reenter the guest without scheduling or exiting to userspace in between), we don't need various msrs on the host, and avoiding shuffling them around reduces raw exit time by 8%. i386 compile fix by Daniel Hecken <dh@bahntechnik.de>. Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: VMX: Handle #SS faults from real modeNitin A Kamble
Instructions with address size override prefix opcode 0x67 Cause the #SS fault with 0 error code in VM86 mode. Forward them to the emulator. Signed-Off-By: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: VMX: Use local labels in inline assemblyAvi Kivity
This makes oprofile dumps and disassebly easier to read. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Fix vmx I/O bitmap initialization on highmem systemsAvi Kivity
kunmap() expects a struct page, not a virtual address. Fixes an oops loading kvm-intel.ko on i386 with CONFIG_HIGHMEM. Thanks to Michael Ivanov <deruhu@peterstar.ru> for reporting. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Avoid corrupting tr in real modeAvi Kivity
The real mode tr needs to be set to a specific tss so that I/O instructions can function. Divert the new tr values to the real mode save area from where they will be restored on transition to protected mode. This fixes some crashes on reboot when the bios accesses an I/O instruction. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: VMX: Only reload guest msrs if they are already loadedAvi Kivity
If we set an msr via an ioctl() instead of by handling a guest exit, we have the host state loaded, so reloading the msrs would clobber host state instead of guest state. This fixes a host oops (and loss of a cpu) on a guest reboot. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Store shadow page tables as kernel virtual addresses, not physicalAvi Kivity
Simpifies things a bit. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: MMU: Simplify kvm_mmu_free_page() a tiny bitAvi Kivity
Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Implement IA32_EBL_CR_POWERON msrMatthew Gregan
Attempting to boot the default 'bsd' kernel of OpenBSD 4.1 i386 in a guest fails early in the kernel init inside p3_get_bus_clock while trying to read the IA32_EBL_CR_POWERON MSR. KVM logs an 'unhandled MSR' message and the guest kernel faults. This patch is sufficient to allow OpenBSD to boot, after which it seems to run fine. I'm not sure if this is the correct solution for dealing with this particular MSR, but it works for me. Signed-off-by: Matthew Gregan <kinetik@flim.org> Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Set cr0.mp for guestsAvi Kivity
This allows fwait instructions to be trapped when the guest fpu is not loaded. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Consolidate guest fpu activation and deactivationAvi Kivity
Easier to keep track of where the fpu is this way. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Rationalize exception bitmap usageAvi Kivity
Everyone owns a piece of the exception bitmap, but they happily write to the entire thing like there's no tomorrow. Centralize handling in update_exception_bitmap() and have everyone call that. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Move some more msr mangling into vmx_save_host_state()Avi Kivity
Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Fix potential guest state leak into hostAvi Kivity
The lightweight vmexit path avoids saving and reloading certain host state. However in certain cases lightweight vmexit handling can schedule() which requires reloading the host state. So we store the host state in the vcpu structure, and reloaded it if we relinquish the vcpu. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Increase mmu shadow cache to 1024 pagesAvi Kivity
This improves kbuild times by about 10%, bringing it within a respectable 25% of native. Signed-off-by: Avi Kivity <avi@qumranet.com>
2007-07-16KVM: Update shadow pte on write to guest pteAvi Kivity
A typical demand page/copy on write pattern is: - page fault on vaddr - kvm propagates fault to guest - guest handles fault, updates pte - kvm traps write, clears shadow pte, resumes guest - guest returns to userspace, re-faults on same vaddr - kvm installs shadow pte, resumes guest - guest continues So, three vmexits for a single guest page fault. But if instead of clearing the page table entry, we update to correspond to the value that the guest has just written, we eliminate the third vmexit. This patch does exactly that, reducing kbuild time by about 10%. Signed-off-by: Avi Kivity <avi@qumranet.com>
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