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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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common sound code otherwise
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Should not need separate cplb entry though as we cover L1 with a 4 meg page
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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- remove duplicated defines for the BF561
- generalize L2 support (so that it works for BF54x) and mark it executable
- add support for reading/executing the Boot ROM sections
(since it has data/functions we may need at runtime)
- and fixup names for each map
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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- no need to declare their sizes in the common header
- no need to tack on the section attribute as only the definition matters, not references
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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L1_SCRATCH defines
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Anomaly 05000312 - Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted:
DESCRIPTION:
When instruction cache is enabled, erroneous behavior may occur when any of the following instructions are interrupted:
. CSYNC
• SSYNC
• LCx =
• LTx = (only when LCx is non-zero)
• LBx = (only when LCx is non-zero)
When this problem occurs, a variety of incorrect things could happen, including an illegal instruction exception. Additional errors could
show up as an exception, a hardware error, or an instruction that is valid but different than the one that was expected.
WORKAROUND:
Place a cli before all SSYNC, CSYNC, "LCx =", "LTx =", and "LBx =" instructions to disable interrupts, and place an sti after each of these
instructions to re-enable interrupts. When these instructions are executed in code that is already non-interruptible, the problem will not
occur.
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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and export it
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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defined
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Config EBIU flash mode properly. EBIU_MODE EBIU_FCTL
EBIU_MBSCTL register should be configurd to Flash
mode.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Revert this patch:
move the init sections to the end of memory, so that after they
are free, run time memory is all continugous - this should help decrease
memory fragementation. When doing this, we also pack some of the other
sections a little closer together, to make sure we don't waste memory.
To make this happen, we need to rename the .data.init_task section to
.init_task.data, so it doesn't get picked up by the linker script glob.
Since it causes the kernel not to boot up with mtd filesystems.
Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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assembly.
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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board files
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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/*
* CPUs often take a performance hit when accessing unaligned memory
* locations. The actual performance hit varies, it can be small if the
* hardware handles it or large if we have to take an exception and fix
* it
* in software.
*
* Since an ethernet header is 14 bytes network drivers often end up
* with
* the IP header at an unaligned offset. The IP header can be aligned by
* shifting the start of the packet by 2 bytes. Drivers should do this
* with:
*
* skb_reserve(NET_IP_ALIGN);
*
* The downside to this alignment of the IP header is that the DMA is
* now
* unaligned. On some architectures the cost of an unaligned DMA is high
* and this cost outweighs the gains made by aligning the IP header.
*
* Since this trade off varies between architectures, we allow
* NET_IP_ALIGN
* to be overridden.
*/
This new function insl_16 allows to read form 32-bit IO and writes to
16-bit aligned memory. This is useful in above described scenario -
In particular with the AXIS AX88180 Gigabit Ethernet MAC.
Once the device is in 32-bit mode, reads from the RX FIFO always
decrements 4bytes.
While on the other side the destination address in SDRAM is always
16-bit aligned.
If we use skb_reserve(0) the receive buffer is 32-bit aligned but later
we hit a unaligned exception in the IP code.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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If you need a 64 bit divide in the kernel, use asm/div64.h.
Revert the addition of udivdi3.
Cc: Bernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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The only user of get_wchan I was able to find is the proc fs - and proc
can't be built modular.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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The only user is the a.out support.
It was therefore removed prior to the blackfin merge from all
architectures not supporting a.out.
Currently, Blackfin doesn't suppport a.out.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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i'm *reasonably* confident that this is a typo that should be fixed.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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require it anymore; fix bus numbers, fix typos
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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newer linux trees
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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use that version now
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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this is not BF537 specific and to better match other Blackfin-specific conventions
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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so move it into board-specific files
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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VDSP has double fault on core a/b inverted for BF561 -- bit 11 is core a while bit 12 is core b
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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since we have this always turned on now and dont want it off (and hasnt been an option in a while)
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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memory fragementation
move the init sections to the end of memory, so that after they
are free, run time memory is all continugous - this should help decrease
memory fragementation. When doing this, we also pack some of the other
sections a little closer together, to make sure we don't waste memory.
To make this happen, we need to rename the .data.init_task section to
.init_task.data, so it doesn't get picked up by the linker script glob.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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double faults in either core
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Signed-off-by: Javier Herrero <jherrero@hvsistemas.es>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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https://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=1685
Ensure that cache/protection is turned back on when we get a
fault, and ensure that the initial population of the CPLB tables are
correct - that kernel is locked in CPLB tables
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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interface
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Remove some sort of bloaty code, try to get these pin_req arrays built at compile-time
- move this static things to the blackfin board file
- add pin_req array to struct bfin5xx_spi_master
- tested on BF537/BF548 with SPI flash
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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gets confused
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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We currently do not. Also make it easier to handle cplb violations - in traps.c
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86
* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86:
x86: simplify "make ARCH=x86" and fix kconfig all.config
x86: reboot fixup for wrap2c board
x86: check boundary in count setup resource
x86: fix reboot with no keyboard attached
x86: add hpet sanity checks
x86: on x86_64, correct reading of PC RTC when update in progress in time_64.c
x86: fix freeze in x86_64 RTC update code in time_64.c
ntp: fix typo that makes sync_cmos_clock erratic
Remove x86 merge artifact from top Makefile
x86: fixup cpu_info array conversion
x86: show cpuinfo only for online CPUs
x86: fix cpu-hotplug regression
x86: ignore the sys_getcpu() tcache parameter
x86: voyager use correct header file name
x86: fix smp init sections
x86: fix voyager_cat_init section
x86: fix bogus memcpy in es7000_check_dsdt()
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Simplify "make ARCH=x86" and fix kconfig so we again can set 64BIT in
all.config.
For a fix the diffstat is nice:
6 files changed, 3 insertions(+), 36 deletions(-)
The patch reverts these commits:
- 0f855aa64b3f63d35a891510cf7db932a435c116 ("kconfig: add helper to set
config symbol from environment variable")
- 2a113281f5cd2febbab21a93c8943f8d3eece4d3 ("kconfig: use $K64BIT to
set 64BIT with all*config targets")
Roman Zippel pointed out that kconfig supported string compares so
the additional complexity introduced by the above two patches were
not needed.
With this patch we have following behaviour:
# make {allno,allyes,allmod,rand}config [ARCH=...]
option \ host arch | 32bit | 64bit
=====================================================
./. | 32bit | 64bit
ARCH=x86 | 32bit | 32bit
ARCH=i386 | 32bit | 32bit
ARCH=x86_64 | 64bit | 64bit
The general rule are that ARCH= and native architecture takes
precedence over the configuration.
So make ARCH=i386 [whatever] will always build a 32-bit kernel
no matter what the configuration says. The configuration will
be updated to 32-bit if it was configured to 64-bit and the
other way around.
This behaviour is consistent with previous behaviour so no
suprises here.
make ARCH=x86 will per default result in a 32-bit kernel but as
the only ARCH= value x86 allow the user to select between 32-bit
and 64-bit using menuconfig.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Roman Zippel <zippel@linux-m68k.org>
Cc: Andreas Herrmann <aherrman@arcor.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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