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The AITC code did not allow to start kernel, if bootloader
manipulates with interrupt level mask. The change ensures,
that NIMASK is initialized into correct state and that
interrupts enable registers are cleared.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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set_irq_chipdata -> set_irq_chip_data
get_irq_chipdata -> get_irq_chip_data
do_level_IRQ -> handle_level_irq
do_edge_IRQ -> handle_edge_irq
do_simple_IRQ -> handle_simple_irq
irqdesc -> irq_desc
irqchip -> irq_chip
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Untested, but this should fix up the bulk of the totally mechanical
issues, and should make the actual detail fixing easier.
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Patch from David Brownell
ARM genirq cleanups/updates:
- Start switching platforms to newer APIs
* use "irq_chip" name, not "irqchip"
* providing irq_chip.name
- Show irq_chip.name in /proc/interrupts, like on x86.
This update a bit more than half of the ARM code. The irq_chip.name
values were chosen to match docs (if I have them) or be otherwise
obvious ("FPGA", "CPLD", or matching the code).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Patch from Matt Reimer
There is a subtle bug in the GPIO interrupt status register
handling in arch/arm/mach-imx/irq.c:imx_gpio_ack_irq(). The
documentation states that a 1 should be written to the relevant bit to
acknowledge a GPIO interrupt, but that is not what the code does.
The problem is that the |= writes back 1s for all the *other*
interrupts represented in the register, so interrupts could get lost.
For example, if interrupts are pending for GPIO B10 and B12, ISR_B
would have the value 0x00001400. Then when the interrupt code handles
GPIO B10, it eventually calls imx_gpio_ack_irq(IRQ_GPIOB(10)), which
effectively does this:
ISR_B |= 1 << 10;
with the result that (0x00001400 | 0x00000400) is written, clearing
the interrupt status bits for *both* GPIO B10 and B12.
The fix is to write 1s only for the interrupts we want to clear.
The same problem seems to be occurring in the DMA code; this patch
does not address those issues.
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matt Reimer <mreimer@vpop.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This is part of Thomas Gleixner's generic IRQ patch, which converts
ARM to use the generic IRQ subsystem. Here, we wrap calls to
desc->handler() in an inline function, desc_handle_irq(). This
reduces the size of Thomas' patch since the changes become more
localised.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This is part of Thomas Gleixner's generic IRQ patch, which converts
ARM to use the generic IRQ subsystem. Here, we rename two of the
irq_chip methods - wake becomes set_wake, and type becomes set_type.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
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