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2008-04-24[ARM] fix 48d7927bdf071d05cf5d15b816cf06b0937cb84fCatalin Marinas
The proc-*.S files have the _prefetch_abort pointer placed at the end of the processor structure but the cpu-multi32.h defines it in the second position. The patch also fixes the support for XSC3 and the MMU-less CPUs (740, 7tdmi, 940, 946 and 9tdmi). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-18Add a prefetch abort handlerPaul Brook
This patch adds a prefetch abort handler similar to the data abort one and renames the latter for consistency. Initial implementation by Paul Brook with some renaming by Catalin Marinas. Signed-off-by: Paul Brook <paul@codesourcery.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2006-12-13[ARM] Unuse another Linux PTE bitRussell King
L_PTE_ASID is not really required to be stored in every PTE, since we can identify it via the address passed to set_pte_at(). So, create set_pte_ext() which takes the address of the PTE to set, the Linux PTE value, and the additional CPU PTE bits which aren't encoded in the Linux PTE value. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-11-30[ARM] Include asm/elf.h instead of asm/procinfo.hRussell King
These files want to provide/access ELF hwcap information, so should be including asm/elf.h rather than asm/procinfo.h Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-07-03[ARM] More missing proc-macros.S includesRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-07-02Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits) [ARM] 3541/2: workaround for PXA27x erratum E7 [ARM] nommu: provide a way for correct control register value selection [ARM] 3705/1: add supersection support to ioremap() [ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructure [ARM] 3706/2: ep93xx: add cirrus logic edb9315a support [ARM] 3704/1: format IOP Kconfig with tabs, create more consistency [ARM] 3703/1: Add help description for ARCH_EP80219 [ARM] 3678/1: MMC: Make OMAP MMC work [ARM] 3677/1: OMAP: Update H2 defconfig [ARM] 3676/1: ARM: OMAP: Fix dmtimers and timer32k to compile on OMAP1 [ARM] Add section support to ioremap [ARM] Fix sa11x0 SDRAM selection [ARM] Set bit 4 on section mappings correctly depending on CPU [ARM] 3666/1: TRIZEPS4 [1/5] core ARM: OMAP: Multiplexing for 24xx GPMC wait pin monitoring ARM: OMAP: Fix SRAM to use MT_MEMORY instead of MT_DEVICE ARM: OMAP: Update dmtimers ARM: OMAP: Make clock variables static ARM: OMAP: Fix GPMC compilation when DEBUG is defined ARM: OMAP: Mux updates for external DMA and GPIO ...
2006-07-01Merge nommu branchRussell King
2006-06-30Remove obsolete #include <linux/config.h>Jörn Engel
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-06-29[ARM] Set bit 4 on section mappings correctly depending on CPURussell King
On some CPUs, bit 4 of section mappings means "update the cache when written to". On others, this bit is required to be one, and others it's required to be zero. Finally, on ARMv6 and above, setting it turns on "no execute" and prevents speculative prefetches. With all these combinations, no one value fits all CPUs, so we have to pick a value depending on the CPU type, and the area we're mapping. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-29[ARM] nommu: provide a way for correct control register value selectionRussell King
Most MMU-based CPUs have a restriction on the setting of the data cache enable and mmu enable bits in the control register, whereby if the data cache is enabled, the MMU must also be enabled. Enabling the data cache without the MMU is an invalid combination. However, there are CPUs where the data cache can be enabled without the MMU. In order to allow these CPUs to take advantage of that, provide a method whereby each proc-*.S file defines the control regsiter value for use with nommu (with the MMU disabled.) Later on, when we add support for enabling the MMU on these devices, we can adjust the "crval" macro to also enable the data cache for nommu. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-28[ARM] nommu: Initial uCLinux support for MMU-based CPUsHyok S. Choi
In noMMU mode, various of functions which are defined in mm/proc-*.S is not valid or needed to be avoided. i.g. switch_mm is not needed, just returns and this makes the I & D caches are valid which shows great improvement of performance including task switching and IPC. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-25Merge nommu treeRussell King
Fix merge conflict in arch/arm/mm/proc-xscale.S Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-21[ARM] Remove unnecessary asm/hardware.h includesRussell King
asm/hardware.h is not required for the majority of processor support files, ioremap support, mm initialisation, acorn IO support, nor the debug code (which picks up its machine specific includes via debug-macros.S) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-21[ARM] nommu: Move hardware page table definitions to pgtable-hwdef.hRussell King
Move the hardware PMD and PTE page table definitions from pgtable.h into pgtable-hwdef.h, and include pgtable-hwdef.h as necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-20[ARM] 2926/1: .proc.info - postfix section with .init for `make buildcheck`Ben Dooks
Patch from Ben Dooks The `make buildcheck` is erroneously reporting that the .proc.info list is referencing items in the .init section as it is not itself postfixed with .init Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-09kbuild: arm - use generic asm-offsets.h supportSam Ravnborg
Delete obsoleted stuff from arch Makefile and rename constants.h to asm-offsets.h Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2005-06-30[PATCH] ARM: 2779/1: Fix the V bit setting for the ARM1020x CPUsCatalin Marinas
Patch from Catalin Marinas This patch fixes the V bit setting for the ARM1020x processors. At reset, this bit is automatically set to the value of the HIVECSINIT input signal which just happened to be 1 but it is not mandatory. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-06-30[PATCH] ARM: 2777/1: Fix broken comment arch/arm/mm/proc-arm1020.SCatalin Marinas
Patch from Catalin Marinas This patch fixes a broken comment in the proc-arm1020.S file which prevents the file compilation Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-04-16Linux-2.6.12-rc2Linus Torvalds
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!