aboutsummaryrefslogtreecommitdiff
path: root/arch/arm
AgeCommit message (Collapse)Author
2010-04-23OMAP4: Fix for CONTROL register BaseSantosh Shilimkar
This patch fixes the base address of CONTROL register on OMAP4430SDP. The control base is used by peripherals like MMC1 for PBIAS configuration. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-04-23OMAP4-HSMMC: FIX for MMC5 Controller IRQ Basekishore kadiyala
This patch fixes HSMMC Controller5 IRQ Base. Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-04-23omap3: Fix EHCI port for IGEP v2 boardEnric Balletbo i Serra
IGEP v2 uses EHCI port 1 instead of EHCI port 2. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-04-23omap: Fix n8x0 mmc_mmc_init compile warnings and typosTony Lindgren
Fix warning: 'return' with a value, in function returning void in n8x0_mmc_init. Also fix a search and replace typo. Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-04-23omap2: Fix ARM processor check for 24xxTony Lindgren
The value to check is 7 for V6 instead. The code has been working as it falls through to 24xx code if the other checks fail. Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-04-23omap4: Fix build break when used with gcc-4.4.1 (2009-q3)Richard Woodruff
This patch adds argument to smc calls as gcc-4.4.1 requires it otherwise the build breaks with 2009-q3 toolchanin. arch/arm/mach-omap2/omap-headsmp.S: Assembler messages: arch/arm/mach-omap2/omap-headsmp.S:36: Error: missing expression -- `smc' arch/arm/mach-omap2/omap-headsmp.S:55: Error: missing expression -- `smc' arch/arm/mach-omap2/omap-headsmp.S:63: Error: missing expression -- `smc' make[1]: *** [arch/arm/mach-omap2/omap-headsmp.o] Error 1 Signed-off-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-04-22omap: DMA: Init CDAC to zeromanjugk manjugk
The register DMA4_CDAC needs to be initialized to zero before starting DMA transfer. Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Govindraj R <govindraj.raja@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Reported-by:S, Venkatraman <svenkatr@ti.com> Signed-off-by: Manjunatha GK <manjugk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-04-22omap: gpio: fix incorrect matching of IRQ_TYPE_EDGE_BOTHJanusz Krzysztofik
Since IRQ_TYPE_EDGE_BOTH is defined as (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING), testing against it with a bitwise AND also matches both single-edge cases in addition to the intended both edges case. Fix it, replacing with a more accurate expression. Created and tested againts linux-2.6.34-rc3. Applicable to 2.6.33-stable as well. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-04-22arm: omap1: remove dead code from timer32k.cFelipe Balbi
Trivial patch, no functional changes Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-04-22omap: fix clocksource_32k to start from zeroAaro Koskinen
When the 32k sync timer is used for sched_clock(), it should count time from the kernel boot (clocksource init) instead of the last HW reset. Otherwise printk.time values will jump suddenly during the boot: [ 0.000000] calling omap2_clk_arch_init+0x0/0x138 @ 1 [ 0.000000] initcall omap2_clk_arch_init+0x0/0x138 returned -22 after 0 usecs [ 0.000000] initcall omap2_clk_arch_init+0x0/0x138 returned with error code -22 [ 0.000000] calling omap_init_clocksource_32k+0x0/0x98 @ 1 [ 508.697937] initcall omap_init_clocksource_32k+0x0/0x98 returned 0 after 0 usecs [ 508.697967] calling omap_init_devices+0x0/0x38 @ 1 [ 508.698425] initcall omap_init_devices+0x0/0x38 returned 0 after 0 usecs This will confuse tools such as scripts/bootgraph.pl. Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-04-22ARM: 6023/1: update bcmring_defconfig to latest version and fix build errorLeo Chen
update bcmring_defconfig to the latest kernel version, this will fix the KAutobuild error. Signed-off-by: Leo Hao Chen <leochen@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-21Merge branch 'for_2.6.34rc_a' of git://git.pwsan.com/linux-2.6 into ↵Tony Lindgren
omap-fixes-for-linus
2010-04-21ARM: fix build error in arch/arm/kernel/process.cRussell King
/tmp/ccJ3ssZW.s: Assembler messages: /tmp/ccJ3ssZW.s:1952: Error: can't resolve `.text' {.text section} - `.LFB1077' This is caused because: .section .data .section .text .section .text .previous does not return us to the .text section, but the .data section; this makes use of .previous dangerous if the ordering of previous sections is not known. Fix up the other users of .previous; .pushsection and .popsection are a safer pairing to use than .section and .previous. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-14ARM: 5974/1: arm/mach-at91 Makefile: remove two blanks.Ernst Schwab
Cosmetic change to mach-at91 Makefile: remove two blanks introduced by earlier patches. Signed-off-by: Ernst Schwab <eschwab@online.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-14ARM: 6052/1: kdump: make kexec work in interrupt contextMika Westerberg
When crash happens in interrupt context there is no userspace context. We always use current->active_mm in those cases. Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-14ARM: 6051/1: VFP: preserve the HW context when calling signal handlersImre Deak
From: Imre Deak <imre.deak@nokia.com> Signal handlers can use floating point, so prevent them to corrupt the main thread's VFP context. So far there were two signal stack frame formats defined based on the VFP implementation, but the user struct used for ptrace covers all posibilities, so use it for the signal stack too. Introduce also a new user struct for VFP exception registers. In this too fields not relevant to the current VFP architecture are ignored. Support to save / restore the exception registers was added by Will Deacon. Signed-off-by: Imre Deak <imre.deak@nokia.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-14ARM: 6050/1: VFP: fix the SMP versions of vfp_{sync,flush}_hwstateImre Deak
From: Imre Deak <imre.deak@nokia.com> Recently the UP versions of these functions were refactored and as a side effect it became possible to call them for the current thread. This isn't true for the SMP versions however, so fix this up. Signed-off-by: Imre Deak <imre.deak@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-14ARM: 6007/1: fix highmem with VIPT cache and DMANicolas Pitre
The VIVT cache of a highmem page is always flushed before the page is unmapped. This cache flush is explicit through flush_cache_kmaps() in flush_all_zero_pkmaps(), or through __cpuc_flush_dcache_area() in kunmap_atomic(). There is also an implicit flush of those highmem pages that were part of a process that just terminated making those pages free as the whole VIVT cache has to be flushed on every task switch. Hence unmapped highmem pages need no cache maintenance in that case. However unmapped pages may still be cached with a VIPT cache because the cache is tagged with physical addresses. There is no need for a whole cache flush during task switching for that reason, and despite the explicit cache flushes in flush_all_zero_pkmaps() and kunmap_atomic(), some highmem pages that were mapped in user space end up still cached even when they become unmapped. So, we do have to perform cache maintenance on those unmapped highmem pages in the context of DMA when using a VIPT cache. Unfortunately, it is not possible to perform that cache maintenance using physical addresses as all the L1 cache maintenance coprocessor functions accept virtual addresses only. Therefore we have no choice but to set up a temporary virtual mapping for that purpose. And of course the explicit cache flushing when unmapping a highmem page on a system with a VIPT cache now can go, which should increase performance. While at it, because the code in __flush_dcache_page() has to be modified anyway, let's also make sure the mapped highmem pages are pinned with kmap_high_get() for the duration of the cache maintenance operation. Because kunmap() does unmap highmem pages lazily, it was reported by Gary King <GKing@nvidia.com> that those pages ended up being unmapped during cache maintenance on SMP causing segmentation faults. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-14ARM: 5975/1: AT91 slow-clock suspend: don't wait when turning PLLs offAnders Larsen
From: Julien Langer <julien.langer@gmail.com> AT91: when turning off the PLLs during suspend, don't wait for the lock flag to be set. Previously the code would always run into the loop limitation of 1000 iterations because the flag is never set when turning the PLLs off. Comments from Anders Larsen: (in http://marc.info/?l=linux-kernel&m=127058929724193&w=2) Signed-off-by: Julien Langer <julien.langer@gmail.com> Signed-off-by: Anders Larsen <al@alarsen.net> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-14mx5: Fix build error for mx51_defconfigDinh Nguyen
Need to include <asm/div64.h> for do_div calls. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-04-12Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* master.kernel.org:/home/rmk/linux-2.6-arm: (21 commits) ARM: Fix ioremap_cached()/ioremap_wc() for SMP platforms ARM: 6043/1: AT91 slow-clock resume: Don't wait for a disabled PLL to lock ARM: 6031/1: fix Thumb-2 decompressor ARM: 6029/1: ep93xx: gpio.c: local functions should be static ARM: 6028/1: ARM: add MAINTAINERS for U300 ARM: 6024/1: bcmring: fix missing down on semaphore in dma.c MXC: mach_armadillo5x0: Add USB Host support. ARM mach-mx3: duplicated include ARM mach-mx3: duplicated include imx31: add watchdog device on litekit board. imx3: Add watchdog platform device support MXC: mach-mx31_3ds: add support for freescale mc13783 power management device. MXC: mach-mx31_3ds: Add SPI1 device support. MXC: mach-mx31_3ds: Add support for on board NAND Flash. MXC: mach-mx31_3ds: Update variable names over recent mach name modification. imx31: fix parent clock for rtc i.MX51: remove NFC AXI static mapping i.MX51: determine silicon revision dynamically i.MX51: map TZIC dynamically i.MX51: Use correct clock for gpt ...
2010-04-09ARM: Fix ioremap_cached()/ioremap_wc() for SMP platformsRussell King
Write combining/cached device mappings are not setting the shared bit, which could potentially cause problems on SMP systems since the cache lines won't participate in the cache coherency protocol. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-04-09ARM: 6043/1: AT91 slow-clock resume: Don't wait for a disabled PLL to lockAnders Larsen
at91 slow-clock resume: Don't wait for a disabled PLL to lock. We run into this problem with the PLLB on the at91: ohci-at91 disables the PLLB when going to suspend. The slowclock code however tries to do the same: It saves the PLLB register value and when restoring the value during resume, it waits for the PLLB to lock again. However the PLL will never lock and the loop would run into its timeout because the slowclock code just stored and restored an empty register. This fixes the problem by only restoring PLLA/PLLB when they were enabled at suspend time. Cc: Andrew Victor <avictor.za@gmail.com> Signed-off-by: Anders Larsen <al@alarsen.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-08Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6Russell King
Conflicts: arch/arm/mach-mx3/mach-pcm037.c
2010-04-07ARM: 6031/1: fix Thumb-2 decompressorRabin Vincent
98e12b5a6e05413 ("ARM: Fix decompressor's kernel size estimation for ROM=y") broke the Thumb-2 decompressor because it added an entry in the LC0 table but didn't adjust the offset the Thumb-2 code uses to load the SP from that table. Fix it. Cc: stable <stable@kernel.org> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-07ARM: 6029/1: ep93xx: gpio.c: local functions should be staticHartley Sweeten
The functions ep93xx_gpio_update_int_params and ep93xx_gpio_int_mask are not exported and should be static. This was overlooked when moving the code from core.c. Also, change a comment to better indicate what the code is for. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-07ARM: 6024/1: bcmring: fix missing down on semaphore in dma.cLeo Chen
Added missing down on the memMap->lock semaphore. Also fixed a return statement so that we always exit with an up (i.e. early exit via return is not allowed) Signed-off-by: Leo Hao Chen <leochen@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-07Merge branch 'davinci-fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci * 'davinci-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci: davinci: fix compile warning: <mach/da8xx.h>: #include <linux/platform_device.h> davinci: DM365: fix duplicate default IRQ priorities davinci: edma: clear events in edma_start() davinci: da8xx/omap-l1: fix build error when CONFIG_DAVINCI_MUX is undefined davinci: timers: don't enable timer until clocksource is initialized
2010-04-07davinci: fix compile warning: <mach/da8xx.h>: #include <linux/platform_device.h>Sergei Shtylyov
This hushes the following warning: arch/arm/mach-davinci/include/mach/da8xx.h:104: warning: ‘struct platform_device’ declared inside parameter list arch/arm/mach-davinci/include/mach/da8xx.h:104: warning: its scope is only this definition or declaration, which is probably not what you want Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-04-05davinci: DM365: fix duplicate default IRQ prioritiesKevin Hilman
IRQ 29 has two possible interrupts DDRINT and RTC, but having both in the default priority table is confusing (and triggers a warning from sparse.) This patch removes the lower priority DDRINT from the default priority table leaving the RTC setting as the default. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-04-05davinci: edma: clear events in edma_start()Brian Niebuhr
This patch fixes an issue where a DMA channel can erroneously process an event generated by a previous transfer. A failure case is where DMA is being used for SPI transmit and receive channels on OMAP L138. In this case there is a single bit that controls all event generation from the SPI peripheral. Therefore it is possible that between when edma_stop() has been called for the transmit channel on a previous transfer and edma_start() is called for the transmit channel on a subsequent transfer, that a transmit event has been generated. The fix is to clear events in edma_start(). This prevents false events from being processed when events are enabled for that channel. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-04-05davinci: da8xx/omap-l1: fix build error when CONFIG_DAVINCI_MUX is undefinedSekhar Nori
The da8xx/omap-l1 boards refuse to build when CONFIG_DAVINCI_MUX is undefined because arch/arm/mach-davinci/mux.c:da8xx_pinmux_setup() is not defined. This patch fixes this issue. This is build tested with davinci_all_defconfig and da8xx_omapl_defconfig and boot tested on DA830 EVM. Reported-by: Shanmuga Sundaram Mahendran <shanmuga@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-04-05davinci: timers: don't enable timer until clocksource is initializedKevin Hilman
On da830, when the same timer is used for clocksource and clockevent, the timer can be started before the clockevent is registered/initialzed. This creates a window where a timer interrupt might fire before the clockevent handler has been setup and causes a crash. This patch moves the actual enable/start of the timer after the clockevent has ben registered. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-04-05Merge branch 'master' into export-slabhTejun Heo
2010-03-31OMAP3: clock: fix enable bit used for dpll4_m4x2 clockRanjith Lohithakshan
The enable bit for dpll4_m4x2 clock should be OMAP3430_PWRDN_DSS1_SHIFT. The code erroneously uses OMAP3430_PWRDN_CAM_SHIFT which is meant for dpll4_m5x2 clock. This came into notice during a recent review of the clock tree. Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-03-31OMAP4: prcm: Use logical OR instead of bitwise ORRajendra Nayak
This patch fixes usage of bitwise OR in if conditions, and instead uses logical OR. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Cc: Abhijit Pagare <abhijitpagare@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-03-31OMAP: HWMOD: Bug fixes in hwmod structure definitionsThara Gopinath
This patch corrects the width of sysc_flags in hwmod sysconfig structure where the values to be stored to this variable exceed the current field width. Signed-off-by: Thara Gopinath <thara@ti.com> [paul@pwsan.com: edited to apply; rearranged structure members to pack] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-03-31OMAP: HWMOD: Adding clockdomain checkThara Gopinath
This patch adds check for presence of clockdomain structure in the API omap_hwmod_get_pwrdm before trying to access the powerdomain structure. This will prevent unnecessary crashing of the system in case of a clock node with out an associated clockdomain. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-03-30include cleanup: Update gfp.h and slab.h includes to prepare for breaking ↵Tejun Heo
implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-30MXC: mach_armadillo5x0: Add USB Host support.Alberto Panizzo
This add USB Host capability. The Armadillo 500 board is supplied with two USB Host connectors driven by the USB OTG and USB Host 2 ports, through two NXP isp 1504 transceivers. Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-03-30ARM mach-mx3: duplicated includeAndrea Gelmini
arch/arm/mach-mx3/mx31lite-db.c: linux/platform_device.h is included more than once. Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-03-30ARM mach-mx3: duplicated includeAndrea Gelmini
arch/arm/mach-mx3/mach-pcm037.c: linux/fsl_devices.h is included more than once. Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-03-30imx31: add watchdog device on litekit board.Vladimir Zapolskiy
This patch adds support for SoC build-in watchdog device on litekit board. Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-03-30imx3: Add watchdog platform device supportVladimir Zapolskiy
This patch adds support for build-in watchdog device found on Freescale imx31 and imx35 SoCs. Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-03-29ARM: 6006/1: ARM: Use the correct NOP size in memmove for Thumb-2 kernel buildsCatalin Marinas
When compiling the kernel to Thumb-2, using a 16-bit NOP in the memmove() implementation causes the preceding ADD PC instruction to branch incorrectly in the middle of a 32-bit LDR or STR instruction. The memmove() code is now similar to the memcpy() template. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-29ARM: 6005/1: arm: kprobes: fix register corruption with jprobesMika Westerberg
Current implementation of jprobes allocates empty pt_regs from the stack which is then passed to kprobe_handler() and eventually to singlestep(). Now when instruction being simulated is STMFD (like in normal function prologues without CONFIG_FRAME_POINTER), stores using SP actually write over top of the fabricated pt_regs structure. This can be reproduced for example by using LKDTM module: # modprobe lkdtm # mount -t debugfs none /sys/kernel/debug # echo PANIC > /sys/kernel/debug/provoke-crash/INT_HW_IRQ_EN after this, it fails with corrupted registers (before the requested crash would occur): lkdtm: Crash point INT_HW_IRQ_EN of type PANIC hit, trigger in 9 rounds lkdtm: Crash point INT_HW_IRQ_EN of type PANIC hit, trigger in 8 rounds Internal error: Oops - undefined instruction: 0 [#1] last sysfs file: /sys/devices/platform/serial8250.0/sleep_timeout Modules linked in: lkdtm CPU: 0 Not tainted (2.6.34-rc2 #69) PC is at irq_desc+0x1638/0xeeb0 LR is at 0x25 pc : [<c050b428>] lr : [<00000025>] psr: c80a0013 sp : ce94bd60 ip : c050b3e8 fp : a0000013 r10: c0aa453c r9 : cf5d4000 r8 : ce9a1822 r7 : c050b424 r6 : 00000025 r5 : c039d8f8 r4 : c050b3e8 r3 : 00000001 r2 : cf4d0440 r1 : c039d8f8 r0 : 00000020 Flags: NZcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 10c5387d Table: 8e804019 DAC: 00000015 Process sh (pid: 496, stack limit = 0xce94a2e8) Stack: (0xce94bd60 to 0xce94c000) [...] Code: 000002cd 00000000 00000000 00000001 (dead4ead) ---[ end trace 2b46d5f2b682f370 ]--- Kernel panic - not syncing: Fatal exception in interrupt This patch allocates enough space (2 * sizeof(struct pt_regs)) from the stack to prevent such corruption. Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-29ARM: 6001/1: removing compilation warning comming from clkdev.hviresh kumar
clkdev.h is using struct device *. Due to this compilation warning is comming. Removing this warning. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-29ARM: 6000/1: removing compilation warning comming from <asm/irq.h>viresh kumar
irq.h is using struct pt_regs *. Due to this compilation warning is comming. Removing this warning by adding declaration of struct pt_regs. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-28ARM: 5997/1: ARM: Correct the VFPv3 detectionCatalin Marinas
A CPU has VFPv3 hardware if the FPSID[19:16] bits are 2 or more. Currently Linux was only checking for 3 or more. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-25ARM: 5996/1: ARM: Change the mandatory barriers implementation (4/4)Catalin Marinas
The mandatory barriers (mb, rmb, wmb) are used even on uniprocessor systems for things like ordering Normal Non-cacheable memory accesses with DMA transfer (via Device memory writes). The current implementation uses dmb() for mb() and friends but this is not sufficient. The DMB only ensures the relative ordering of the observability of accesses by other processors or devices acting as masters. In case of DMA transfers started by writes to device memory, the relative ordering is not ensured because accesses to slave ports of a device are not considered observable by the DMB definition. A DSB is required for the data to reach the main memory (even if mapped as Normal Non-cacheable) before the device receives the notification to begin the transfer. Furthermore, some L2 cache controllers (like L2x0 or PL310) buffer stores to Normal Non-cacheable memory and this would need to be drained with the outer_sync() function call. The patch also allows platforms to define their own mandatory barriers implementation by selecting CONFIG_ARCH_HAS_BARRIERS and providing a mach/barriers.h file. Note that the SMP barriers are unchanged (being DMBs as before) since they are only guaranteed to work with Normal Cacheable memory. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-11 03:40:40 +0000