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path: root/arch/blackfin/include/asm/bfin5xx_spi.h
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2009-04-07Blackfin SPI Driver: Make mmc_spi driver work on BlackfinWolfgang Muees
1. Rewrite of the non-dma data transfer functions to use only ONE mode of TIMOD (TIMOD=0x1). With TIMOD=0, it was not possible to set the TX bit pattern. So the TDBR = 0xFFFF inside the read calls won't work. 2. Clear SPI_RDBR before reading and before duplex transfer. Otherwise the garbage data in RDBR will get read. Since mmc_spi uses a lot of duplex transfers, this is the main cause of mmc_spi failure. 3. Poll RXS for transfer completion. Polling SPIF or TXS cannot guarantee transfer completion. This may interrupt a transfer before it is finished. Also this may leave garbage data in buffer and affect next transfer. [Yi Li <yi.li@analog.com>: add a field "u16 idle_tx_val" in "struct bfin5xx_spi_chip" to specify the value to transmit if no TX value is supplied.] Signed-off-by: Wolfgang Muees <wolfgang.mues@auerswald.de> Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07Blackfin SPI Driver: Add GPIO controlled SPI Slave Select supportMichael Hennerich
Add support for GPIO controlled SPI Chip Selects. To make use of this feature, set chip_select = 0 and add a proper cs_gpio to your controller_data. struct spi_board_info .chip_select = 0 struct bfin5xx_spi_chip .cs_gpio = GPIO_P### There are various SPI devices that require SPI MODE_0, and need to have the Chip Selects asserted during the entire transfer. Consider using SPI_MODE_3 (SPI_CPHA | SPI_CPOL) if your device allows it. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07Blackfin SPI Driver: Fix erroneous SPI Clock divisor calculationMichael Hennerich
Fix erroneous SPI Clock divisor calculation. Make sure SPI_BAUD is always >= 2. Writing a value of 0 or 1 to the SPI_BAUD register disables the serial clock. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-03-28Blackfin arch: sport spi needs 6 gpio pinsCliff Cai
Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-01-07Blackfin arch: cleanup the header file commentsMike Frysinger
use scm changelog rather than comment blocks in files Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-08-27Blackfin arch: move include/asm-blackfin header files to arch/blackfinBryan Wu
Signed-off-by: Bryan Wu <cooloney@kernel.org>