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path: root/arch/i386/kernel/mpparse.c
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2006-12-07[PATCH] x86-64: remove remaining pc98 codeAdrian Bunk
Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de>
2006-09-26[PATCH] i386: Support physical cpu hotplug for x86_64Ashok Raj
This patch enables ACPI based physical CPU hotplug support for x86_64. Implements acpi_map_lsapic() and acpi_unmap_lsapic() to support physical cpu hotplug. Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@muc.de> Cc: "Brown, Len" <len.brown@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org>
2006-09-26[PATCH] i386: Fix warning in mpparse.cAndi Kleen
Fix linux/arch/i386/kernel/mpparse.c: In function #MP_bus_info#: linux/arch/i386/kernel/mpparse.c:232: warning: comparison is always false due to limited range of data type Signed-off-by: Andi Kleen <ak@suse.de>
2006-09-26[PATCH] i386: Clean up code style in mpparse.c ACPI codeAndi Kleen
Remove some unlinuxy ways to write function parameter definitions. Remove some stray "return;"s No functional change. Cc: len.brown@intel.com Signed-off-by: Andi Kleen <ak@suse.de>
2006-09-26[PATCH] i386/x86-64: Remove obsolete sanity check in mptable parsingAndi Kleen
It apparently has never triggered in many years. Signed-off-by: Andi Kleen <ak@suse.de>
2006-09-26[PATCH] i386: Allow to use GENERICARCH for UP kernelsAndi Kleen
There are some machines around (large xSeries or Unisys ES7000) that need physical IO-APIC destination mode to access all of their IO devices. This currently doesn't work in UP kernels as used in distribution installers. This patch allows to compile even UP kernels as GENERICARCH which allows to use physical or clustered APIC mode. Signed-off-by: Andi Kleen <ak@suse.de>
2006-06-30Remove obsolete #include <linux/config.h>Jörn Engel
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-05-08[PATCH] x86_64: avoid IRQ0 ioapic pin collisionKimball Murray
The patch addresses a problem with ACPI SCI interrupt entry, which gets re-used, and the IRQ is assigned to another unrelated device. The patch corrects the code such that SCI IRQ is skipped and duplicate entry is avoided. Second issue came up with VIA chipset, the problem was caused by original patch assigning IRQs starting 16 and up. The VIA chipset uses 4-bit IRQ register for internal interrupt routing, and therefore cannot handle IRQ numbers assigned to its devices. The patch corrects this problem by allowing PCI IRQs below 16. Cc: len.brown@intel.com Signed-off by: Natalie Protasevich <Natalie.Protasevich@unisys.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-04-11[PATCH] mpparse: prevent table index out-of-boundsRandy Dunlap
John Z. Bohach <jzb@aexorsyst.com> found this bug: If the board has more than 32 PCI busses on it, the mptable bus array will overwrite its bounds for the PCI busses, and stomp on anything that's after it. Prevent possible table overflow and unknown data corruption. Code is in an __init section so it will be discarded after init. Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-04-11[PATCH] swsusp: don't require bigsmpAshok Raj
Switching to automatic bigsmp causes a misleading error message, that more then 8 cpus are detected, and user needs to select either X86_GENERICARCH or X86_BIGSMP to handle. Reason is we switched to bigsmp to avoid IP race when new cpu is comming up. [bigsmp is nothing but using physical flat mode that can work for 1 .. 255 cpus] [default is X86_PC, that uses logical flat mode up to 8 CPUs max] Current x86_64 code uses bigsmp as default when hotplug is enabled. It would be preferable to make bigsmp as default, and work the dependencies of other related code like SMP_SUSPEND, and some related to memory hotplug code for i386. Current logical flat mode doesnt use shortcuts that cause the race by using the send_IPI_mask() instead of shortcuts when HOTPLUG_CPU is enabled. In the meantime this patch is the path of lease resistance. We will switch to bigsmp default sometime soon, when we get to work it again. Signed-off-by: Ashok Raj <ashok.raj@intel.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: Nigel Cunningham <nigel@suspend2.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-04-09[PATCH] i386: Consolidate modern APIC handlingAndi Kleen
AMD systems have a modern APIC that supports 8 bit IDs, but don't have a XAPIC version number. Add a new "modern_apic" subfunction that handles this correctly and use it (nearly) everywhere where XAPIC is tested for. I removed one wart: the code specified that external APICs would use an 8bit APIC ID. But I checked a real 82093 data sheet and it says clearly that they only use 4bit. So I removed this special case since it would a bit awkward to implement now. I removed the valid APIC tests in mptable parsing completely. On any modern system they only check against the full field width (8bit) anyways and are no-ops. This also fixes them doing the wrong thing on >8 core Opterons. This makes i386 boot again on 16 core Opterons. Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-23[PATCH] x86: deterine xapic using apic versionShaohua Li
Checking APIC version instead of CPU family to determine XAPIC. Family 6 CPU could have xapic as well. Signed-off-by: Shaohua Li<shaohua.li@intel.com> Cc: Dave Jones <davej@codemonkey.org.uk> Cc: "Seth, Rohit" <rohit.seth@intel.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-23[PATCH] Compilation fix for ES7000 when no ACPI is specified in config (i386)Natalie.Protasevich@unisys.com
ES7000 platform code clean up for compilation errors and a warning. Ifdef'd the ACPI related parts in the ES7000 platform code. They were causing compile errors in certain configuration (without ACPI defined). I think this approach would be best (as opposed to Kconfig changes) since it only touches the subarch... Signed-off-by: <Natalie.Protasevich@unisys.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-26[PATCH] i386: Handle non existing APICs without panicingAndreas Deresch
[description from AK] This fixes booting in APIC mode on some ACER laptops. x86-64 did a similar change some time ago. See http://bugzilla.kernel.org/show_bug.cgi?id=4700 for details Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-20[PATCH] i386: need to pass virtual address to smp_read_mpc()Daniel Yeisley
I'm seeing a kernel panic on an ES7000-600 when booting in virtual wire mode. The panic happens because smp_read_mpc() is passed a physical address, and it should be virtual. I tested the attached patch on the ES7000-600 and on a 2 cpu Dell box, and saw no problems on either. Signed-off-by: Dan Yeisley <dan.yeisley@unisys.com> Acked-by: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-07Pull pnpacpi into acpica branchLen Brown
2006-01-06[PATCH] make bigsmp the default mode if CONFIG_HOTPLUG_CPUAshok Raj
If we are using hotplug enabled kernel, then make bigsmp the default mode. Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-28[ACPI] acpi_register_gsi() fix needed for ACPICA 20051021Len Brown
Use the #define for ACPI_LEVEL_SENSITIVE instead of assuming non-zero, because ACPICA 20051021 changes its value to zero. Also, use uniform variable names: edge_level -> triggering active_high_low -> polarity Signed-off-by: Len Brown <len.brown@intel.com>
2005-11-20[PATCH] i386: Use bigsmp for > 8 core Opteron systemsAndi Kleen
bigsmp is reported to work on large Opteron systems on 32bit too. Enable it by default there. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-30[PATCH] i386 mpparse: Only ignore lapic information we can't storeEric W. Biederman
After staring at mpparse.c for a little longer I noticed that when we hit our limit of num_processors we are filtering out information about other processors that we can still store. This patch just reorders the code so we store everything we can. This should avoid the incorrect warning about our boot CPU not being listed by the BIOS that we are now getting in the kexec on panic case, and it should allow us to detect all apicid conflicts even when our physical number of cpus exceeds maxcpus. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-30[PATCH] x86: hot plug CPU to support physical add of new processorsNatalie Protasevich
The patch allows physical bring-up of new processors (not initially present in the configuration) from facilities such as driver/utility implemented on a platform. The actual method of making processors available is up to the platform implementation. Signed-off-by: Natalie Protasevich <Natalie.Protasevich@unisys.com> Cc: Shaohua Li <shaohua.li@intel.com> Cc: Ashok Raj <ashok.raj@intel.com> Cc: Zwane Mwaikambo <zwane@holomorphy.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-26[PATCH] useless includes of linux/irq.h in arch/i386Al Viro
Most of these guys are simply not needed (pulled by other stuff via asm-i386/hardirq.h). One that is not entirely useless is hilarious - arch/i386/oprofile/nmi_timer_int.c includes linux/irq.h... as a way to get linux/errno.h Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-09[PATCH] x86: MP_processor_info fixAndrew Morton
Remove the weird and apparently unnecessary logic in MP_processor_info() which assumes that the BSP is the first one to run MP_processor_info(). On one of my boxes that isn't true and cpu_possible_map gets the wrong value. Cc: Zwane Mwaikambo <zwane@arm.linux.org.uk> Cc: Alexander Nyberg <alexn@telia.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-08Merge linux-2.6 with linux-acpi-2.6Len Brown
2005-09-05[PATCH] i386 boottime for_each_cpu brokenZwane Mwaikambo
for_each_cpu walks through all processors in cpu_possible_map, which is defined as cpu_callout_map on i386 and isn't initialised until all processors have been booted. This breaks things which do for_each_cpu iterations early during boot. So, define cpu_possible_map as a bitmap with NR_CPUS bits populated. This was triggered by a patch i'm working on which does alloc_percpu before bringing up secondary processors. From: Alexander Nyberg <alexn@telia.com> i386-boottime-for_each_cpu-broken.patch i386-boottime-for_each_cpu-broken-fix.patch The SMP version of __alloc_percpu checks the cpu_possible_map before allocating memory for a certain cpu. With the above patches the BSP cpuid is never set in cpu_possible_map which breaks CONFIG_SMP on uniprocessor machines (as soon as someone tries to dereference something allocated via __alloc_percpu, which in fact is never allocated since the cpu is not set in cpu_possible_map). Signed-off-by: Zwane Mwaikambo <zwane@arm.linux.org.uk> Signed-off-by: Alexander Nyberg <alexn@telia.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-05[PATCH] x86: sutomatically enable bigsmp when we have more than 8 CPUsVenkatesh Pallipadi
i386 generic subarchitecture requires explicit dmi strings or command line to enable bigsmp mode. The patch below removes that restriction, and uses bigsmp as soon as it finds more than 8 logical CPUs, Intel processors and xAPIC support. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-08-24[ACPI] delete CONFIG_ACPI_BUSLen Brown
it is a synonym for CONFIG_ACPI Signed-off-by: Len Brown <len.brown@intel.com>
2005-08-24[ACPI] delete CONFIG_ACPI_INTERPRETERLen Brown
it is a synonym for CONFIG_ACPI Signed-off-by: Len Brown <len.brown@intel.com>
2005-08-24[ACPI] delete CONFIG_ACPI_BOOTLen Brown
it has been a synonym for CONFIG_ACPI since 2.6.12 Signed-off-by: Len Brown <len.brown@intel.com>
2005-07-29[PATCH] x86: avoid wasting IRQs patch updateNatalie.Protasevich@unisys.com
The patch addresses a problem with ACPI SCI interrupt entry, which gets re-used, and the IRQ is assigned to another unrelated device. The patch corrects the code such that SCI IRQ is skipped and duplicate entry is avoided. Second issue came up with VIA chipset, the problem was caused by original patch assigning IRQs starting 16 and up. The VIA chipset uses 4-bit IRQ register for internal interrupt routing, and therefore cannot handle IRQ numbers assigned to its devices. The patch corrects this problem by allowing PCI IRQs below 16. Signed-off by: Natalie Protasevich <Natalie.Protasevich@unisys.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-25[PATCH] i386: cleanup boot_cpu_logical_apicid variablesAdrian Bunk
There are currently two different boot_cpu_logical_apicid variables: - a global one in mpparse.c - a static one in smpboot.c Of these two, only the one in smpboot.c might be used (through boot_cpu_apicid). This patch therefore removes the one in mpparse.c . Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Andrey Panin <pazke@donpac.ru> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23[PATCH] x86: avoid wasting IRQs for PCI devicesNatalie Protasevich
I have submitted the patch for x86_64, this is submission for i386. The patch changes the way IRQs are handed out to PCI devices. Currently, each I/O APIC pin gets associated with an IRQ, no matter if the pin is used or not. This imposes severe limitation on systems that have designs that employ many I/O APICs, only utilizing couple lines of each, such as P64H2 chipset. It is used in ES7000, and currently, there is no way to boot the system with more that 9 I/O APICs. The simple change below allows to boot a system with say 64 (or more) I/O APICs, each providing 1 slot, which otherwise impossible because of the IRQ gaps created for unused lines on each I/O APIC. It does not resolve the problem with number of devices that exceeds number of possible IRQs, but eases up a tension for IRQs on any large system with potentually large number of devices. Signed-off-by: Natalie Protasevich <Natalie.Protasevich@unisys.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23[PATCH] Do not enforce unique IO_APIC_ID check for xAPIC systems (i386)Natalie Protasevich
This patch is per Andi's request to remove NO_IOAPIC_CHECK from genapic and use heuristics to prevent unique I/O APIC ID check for systems that don't need it. The patch disables unique I/O APIC ID check for Xeon-based and other platforms that don't use serial APIC bus for interrupt delivery. Andi stated that AMD systems don't need unique IO_APIC_IDs either. Signed-off-by: Natalie Protasevich <Natalie.Protasevich@unisys.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-16Linux-2.6.12-rc2Linus Torvalds
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!