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2006-04-19[MIPS] FPU affinity for MT ASE.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] MT: Improved multithreading support.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] kpsd and other AP/SP improvements.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] Enable SCHED_NO_NO_OMIT_FRAME_POINTER for MIPS.Atsushi Nemoto
MIPS get_wchan() no longer requires -fno-omit-frame-pointer. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-11[PATCH] Configurable NODES_SHIFTYasunori Goto
Current implementations define NODES_SHIFT in include/asm-xxx/numnodes.h for each arch. Its definition is sometimes configurable. Indeed, ia64 defines 5 NODES_SHIFT values in the current git tree. But it looks a bit messy. SGI-SN2(ia64) system requires 1024 nodes, and the number of nodes already has been changeable by config. Suitable node's number may be changed in the future even if it is other architecture. So, I wrote configurable node's number. This patch set defines just default value for each arch which needs multi nodes except ia64. But, it is easy to change to configurable if necessary. On ia64 the number of nodes can be already configured in generic ia64 and SN2 config. But, NODES_SHIFT is defined for DIG64 and HP'S machine too. So, I changed it so that all platforms can be configured via CONFIG_NODES_SHIFT. It would be simpler. See also: http://marc.theaimsgroup.com/?l=linux-kernel&m=114358010523896&w=2 Signed-off-by: Yasunori Goto <y-goto@jp.fujitsu.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Richard Henderson <rth@twiddle.net> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Jack Steiner <steiner@sgi.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-04-02Manual merge with Linus.Dmitry Torokhov
Conflicts: arch/powerpc/kernel/setup-common.c drivers/input/keyboard/hil_kbd.c drivers/input/mouse/hil_ptr.c
2006-03-26[PATCH] bitops: mips: use generic bitopsAkinobu Mita
- remove __{,test_and_}{set,clear,change}_bit() and test_bit() - unless defined(CONFIG_CPU_MIPS32) or defined(CONFIG_CPU_MIPS64) - remove __ffs() - remove ffs() - remove ffz() - remove fls() - remove fls64() - remove find_{next,first}{,_zero}_bit() - remove sched_find_first_bit() - remove generic_hweight64() - remove generic_hweight{32,16,8}() - remove ext2_{set,clear,test,find_first_zero,find_next_zero}_bit() - remove ext2_{set,clear}_bit_atomic() - remove minix_{test,set,test_and_clear,test,find_first_zero}_bit() Signed-off-by: Akinobu Mita <mita@miraclelinux.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-21[MIPS] TX49XX has prefetch.Atsushi Nemoto
The TX49XX has the prefetch instruction. It supports only Pref_Load (hint 0). Actually changes in this patch except for Kconfig are not have any effects, I added these changes to prevent misuse of unsupported hints. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21[MIPS] Mention Broadcom part number for BigSur boardMartin Michlmayr
Mention the Broadcom part number for the BigSur board (BCM91480B) in Kconfig, just like it's done for other Broadcom boards. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21[MIPS] Symmetric Uniprocessor support for Qemu.Ralf Baechle
SMP bits needed to builds and run an SMP kernel. While only a single processor is supported ATM it's still useful for some SMP debugging using Qemu. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21[MIPS] Add early console for Cobalt.Peter Horton
Signed-off-by: Peter Horton <pdh@colonel-panic.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-14Input: pcspkr - separate device and driver registrationMichael Neuling
The current pcspkr code combines the device and driver registration. This patch splits these, putting the device registration in the arch specific code. PowerPC and MIPS only have the pcspkr present sometimes. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
2006-03-09[MIPS] Enable highmem for all MIPS32 and MIPS64 processors.Ralf Baechle
In case a particular system doesn't support highmem the runtime checks will ensure nothing bad is going to happen. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07[MIPS] Nevada support for SGI O2.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10MIPS: R2: Set 64BIT_PHYS_ADDR for R2 processor also.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10MIPS: Remove unused CONFIG_CPU_HAS_LLDSCD.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-12-01[MIPS] Kconfig: Include init/Kconfig after we've set 32BIT / 64BIT.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-07PNX8550 uses a MIPS32-like processor core, not R4xx0.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29More foolproofing of the CPU configuration.Ralf Baechle
Limit the number of cpu type options in the cpu menu to just those types that are actually available for the select platform. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29BCM1480 HT supportAndrew Isaacson
PCI support code for PLX 7250 PCI-X tunnel on BCM91480B BigSur board. Signed-Off-By: Andy Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Support for BigSur board.Andrew Isaacson
Signed-Off-By: Andy Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Add support for BCM1480 family of chips.Andrew Isaacson
- Kconfig and Makefile changes - arch/mips/sibyte/bcm1480/ - changes to sibyte common code to support 1480 Signed-Off-By: Andy Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Sliceup Kconfig; it's grown too large.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Document the meaning of the CPU_MIPS32, CPU_MIPS64, CPU_MIPSR1 andRalf Baechle
CPU_MIPSR2. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Support for MIPSsim, the cycle accurate MIPS simulator.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Use ARCH_MAY_HAVE_PC_FDC where needed.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Cleaned up AMD Au1200 IDE driver:Pete Popov
- converted to platform bus - removed pci dependencies - removed virt_to_phys/phys_to_virt calls System now can root off of a disk. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> diff --git a/Documentation/mips/AU1xxx_IDE.README b/Documentation/mips/AU1xxx_IDE.README new file mode 100644
2005-10-29Virtual SMP support for the 34K.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29A little more Kconfig untangeling.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Send CONFIG_VTAG_ICACHE back into it's cold grave.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Get rid of the nonsense in the CONFIG_CPU_HAS_PREFETCH block.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Support for Toshiba's RBHMA4500 eval board for the TX4938.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Drop IP27 support for Qlogic ISP. This driver is buggy and has beenRalf Baechle
obsoleted by the qla1280 after the recent fixes. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.Pete Popov
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29More AP / SP bits for the 34K, the Malta bits and things. Still wantsRalf Baechle
a little polishing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29MIPS 32/64 R2 config option.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Use Kconfig.preempt.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29The DbAu1500 board also support big endian. Gee, imagine that.Steven J. Hill
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29SECCOMP for MIPS.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Use new txx9 serial driver.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Base Au1200 2.6 support.Pete Popov
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Changed all Au1x boards to noncoherent again.Pete Popov
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29If you want RM7000 better fix it to build first ...Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Enable RM7000 secondary cache for Atlas and Malta boards.Maciej W. Rozycki
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29It works better when including arch/mips/sgi-ip27/Kconfig ...Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Move Sibyte Kconfig stuff into it's own Kconfig.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Update descriptions for MIPS Technologies evaluation boards.Maciej W. Rozycki
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Reenable EARLY_PRINTK for the DECstation.Maciej W. Rozycki
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-09-14[LIB]: Consolidate _atomic_dec_and_lock()David S. Miller
Several implementations were essentialy a common piece of C code using the cmpxchg() macro. Put the implementation in one spot that everyone can share, and convert sparc64 over to using this. Alpha is the lone arch-specific implementation, which codes up a special fast path for the common case in order to avoid GP reloading which a pure C version would require. Signed-off-by: David S. Miller <davem@davemloft.net>