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2010-04-12MIPS: Octeon: Remove redundant declaration of octeon_reserve32_memoryYang Shi
octeon_reserve32_memory is defined In Octeon's setup.c, so remove the redundant extern declaration of this variable. Signed-off-by: Yang Shi <yang.shi@windriver.com> To: f.fainelli@gmail.com Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1022/ Acked-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Octeon: Remove #if 0 code.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1029/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Octeon: Remove vestiges of CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLBDavid Daney
The config option CAVIUM_RESERVE32_USE_WIRED_TLB is not supported. Remove the dead code controlled by it. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1028/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Cavium: Remove unused watchdog code.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Use ALIGN(x, bytes) instead of __ALIGN_MASK(x, bytes - 1)Matt Turner
ALIGN(x, bytes) expands to __ALIGN_MASK(x, bytes - 1), so use the one that is most clear. Signed-off-by: Matt Turner <mattst88@gmail.com> To: linux-mips@linux-mips.org Cc: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/999/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Octeon: Replace spinlock with raw_spinlocks in dma-octeon.c.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/973/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Octeon: Replace rwlocks in irq_chip handlers with raw_spinlocks.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/972/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Octeon: Convert octeon_irq_msi_lock to raw spinlock.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Make various locks static.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Octeon: Do proper acknowledgment of CIU timer interrupts.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: netdev@vger.kernel.org To: gregkh@suse.de Patchwork: http://patchwork.linux-mips.org/patch/967/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Remove trailing space in messagesFrans Pop
Signed-off-by: Frans Pop <elendil@planet.nl> To: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/946/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Nuke trailing blank linesRalf Baechle
Recent git versions now warn about those and they've always been a bit of an annoyance. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Octeon: Fix EOI handling.David Daney
If an interrupt handler disables interrupts, the EOI function will just reenable them. This will put us in an endless loop when the upcoming Ethernet driver patches are applied. Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This requires that the EOI function be separate from the ENABLE function. We also rename the ACK functions to correspond with their function. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: gregkh@suse.de Patchwork: http://patchwork.linux-mips.org/patch/840/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Octeon: Register some devices on the I2C bus.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: linux-i2c@vger.kernel.org To: ben-linux@fluff.org To: khali@linux-fr.org Cc: Rade Bozic <rade.bozic.ext@nsn.com> Patchwork: http://patchwork.linux-mips.org/patch/845/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Octeon: Add I2C platform device.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: linux-i2c@vger.kernel.org To: ben-linux@fluff.org To: khali@linux-fr.org Cc: Rade Bozic <rade.bozic.ext@nsn.com> Patchwork: http://patchwork.linux-mips.org/patch/847/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: Octeon: Use non-overflowing arithmetic in sched_clockDavid Daney
With typical mult and shift values, the calculation for Octeon's sched_clock overflows when using 64-bit arithmetic. Use 128-bit calculations instead. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/849/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: Octeon: Add sched_clock() to csrc-octeon.cDavid Daney
With the advent of function graph tracing on MIPS, Octeon needs a high precision sched_clock() implementation. Without it, most timing numbers are reported as 0.000. This new sched_clock just uses the 64-bit cycle counter appropriately scaled. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/805/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17MIPS: Modularize COP2 handlingRalf Baechle
Away with the daemons of ifdef; get ready for future COP2 users. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/708/
2009-12-17MIPS: Octeon: Add platform devices MGMT Ethernet ports.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17MIPS: Octeon: Add platform device for MDIO buses.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Octeon: Use lockless interrupt controller operations when possible.David Daney
Some newer Octeon chips have registers that allow lockless operation of the interrupt controller. Take advantage of them. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinityDavid Daney
Since the locks are used from interrupt context we need the irqsave/irqrestore versions of the locking functions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Octeon: Fix compile error in arch/mips/cavium-octeon/smp.cDavid Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Octeon: Move some platform device registration to its own file.David Daney
There is a bunch of platform device registration in arch/mips/cavium-octeon/setup.c. We move it to its own file in preparation for adding more platform devices. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Octeon: Add hardware RNG platform device.David Daney
Add a platform device for the Octeon Random Number Generator (RNG). Signed-off-by: David Daney <ddaney@caviumnetworks.com> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-08-03MIPS: Octeon: Run IPI code with interrupts disabled.David Daney
In mm/slab.c the function do_ccupdate_local requires that interrupts be disabled. If they are not, we panic with CONFIG_DEBUG_SLAB. So we disable interrupts while processing IPIs. Also these are not shared irqs, so get rid of the IRQF_SHARED flag. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03MIPS: Reorganize Cavium OCTEON PCI support.David Daney
Move the cavium PCI files to the arch/mips/pci directory. Also cleanup comment formatting and code layout. Code from pci-common.c, was moved into other files. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-24MIPS: Cavium: Add CPU hotplugging code.Ralf Baechle
Thanks to Cavium Inc. for the code contribution and help. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-24MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.Ralf Baechle
Some of the were relying into smp.h being dragged in by another header which of course is fragile. <asm/cpu-info.h> uses smp_processor_id() only in macros and including smp.h there leads to an include loop, so don't change cpu-info.h. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Export erratum function needed by octeon-ethernet driver.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Export cvmx_sysinfo_get needed by octeon-ethernet driver.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Add named alloc functions to OCTEON boot monitor memory allocator.David Daney
The various Octeon ethernet drivers use these new functions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Add Cavium OCTEON PCI support.David Daney
This patch adds support for PCI and PCIe to the base Cavium OCTEON processor support. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-01Merge branch 'linus' into irq/numaIngo Molnar
Conflicts: arch/mips/sibyte/bcm1480/irq.c arch/mips/sibyte/sb1250/irq.c Merge reason: we gathered a few conflicts plus update to latest upstream fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-05-14MIPS: Cavium: Add struct clocksource * argument to octeon_cvmcount_read()Coly Li
This patch modifies parameter of octeon_cvmcount_read() from 'void' to 'struct clocksource *cs', which fixes compile warning for incompatible parameter type. Signed-off-by: Coly Li <coly.li@suse.de> Cc: David Daney <ddaney@caviumnetworks.com> Cc: Ingo Molnar <mingo@elte.hu> Reviewed-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-04-28irq: change ->set_affinity() to return statusYinghai Lu
according to Ingo, change set_affinity() in irq_chip should return int, because that way we can handle failure cases in a much cleaner way, in the genirq layer. v2: fix two typos [ Impact: extend API ] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: linux-arch@vger.kernel.org LKML-Reference: <49F654E9.4070809@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-03-30MIPS: Convert obsolete irq_desc_t to struct irq_descThomas Gleixner
Impact: cleanup Convert the last remaining users to struct irq_desc. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-03-30MIPS: Stop using <asm-generic/int-l64.h>.Ralf Baechle
This fixes a few warnings - and triggers a few new ones which the rest of this patch fixes. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-03-30MIPS: Cavium: Add -WerrorRalf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Octeon: Remove duplicated #includesHuang Weiyi
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.David Daney
These are the rest of the new files needed to add OCTEON processor support to the Linux kernel. Other than Makefile and Kconfig which should be obvious, we have: csrc-octeon.c -- Clock source driver for OCTEON. dma-octeon.c -- Helper functions for mapping DMA memory. flash_setup.c -- Register on-board flash with the MTD subsystem. octeon-irq.c -- OCTEON interrupt controller managment. octeon-memcpy.S -- Optimized memcpy() implementation. serial.c -- Register 8250 platform driver and early console. setup.c -- Early architecture initialization. smp.c -- OCTEON SMP support. octeon_switch.S -- Scheduler context switch for OCTEON. c-octeon.c -- OCTEON cache controller support. cex-oct.S -- OCTEON cache exception handler. asm/mach-cavium-octeon/*.h -- Architecture include files. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 arch/mips/cavium-octeon/Kconfig create mode 100644 arch/mips/cavium-octeon/Makefile create mode 100644 arch/mips/cavium-octeon/csrc-octeon.c create mode 100644 arch/mips/cavium-octeon/dma-octeon.c create mode 100644 arch/mips/cavium-octeon/flash_setup.c create mode 100644 arch/mips/cavium-octeon/octeon-irq.c create mode 100644 arch/mips/cavium-octeon/octeon-memcpy.S create mode 100644 arch/mips/cavium-octeon/serial.c create mode 100644 arch/mips/cavium-octeon/setup.c create mode 100644 arch/mips/cavium-octeon/smp.c create mode 100644 arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/irq.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/war.h create mode 100644 arch/mips/include/asm/octeon/octeon.h create mode 100644 arch/mips/kernel/octeon_switch.S create mode 100644 arch/mips/mm/c-octeon.c create mode 100644 arch/mips/mm/cex-oct.S
2009-01-11MIPS: Add Cavium OCTEON processor support files to ↵David Daney
arch/mips/cavium-octeon/executive and asm/octeon. These files are used to coordinate resource sharing between all of the programs running on the OCTEON SOC. The OCTEON processor has many CPU cores (current parts have up to 16, but more are possible). It also has a variety of on-chip hardware blocks for things like network acceleration, encryption and RAID. One typical configuration is to run Linux on several of the CPU cores, and other dedicated applications on the other cores. Resource allocation between the various programs running on the system (Linux kernel and other dedicated applications) needs to be coordinated. The code we use to do this we call the 'executive'. All of this resource allocation and sharing code is gathered together in the executive directory. Included in the patch set are the following files: cvmx-bootmem.c and cvmx-sysinfo.c -- Coordinate memory allocation. All memory used by the Linux kernel is obtained here at boot time. cvmx-l2c.c -- Coordinates operations on the shared level 2 cache. octeon-model.c -- Probes chip capabilities and version. The corresponding headers are in asm/octeon. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 arch/mips/cavium-octeon/executive/Makefile create mode 100644 arch/mips/cavium-octeon/executive/cvmx-bootmem.c create mode 100644 arch/mips/cavium-octeon/executive/cvmx-l2c.c create mode 100644 arch/mips/cavium-octeon/executive/cvmx-sysinfo.c create mode 100644 arch/mips/cavium-octeon/executive/octeon-model.c create mode 100644 arch/mips/include/asm/octeon/cvmx-asm.h create mode 100644 arch/mips/include/asm/octeon/cvmx-bootinfo.h create mode 100644 arch/mips/include/asm/octeon/cvmx-bootmem.h create mode 100644 arch/mips/include/asm/octeon/cvmx-l2c.h create mode 100644 arch/mips/include/asm/octeon/cvmx-packet.h create mode 100644 arch/mips/include/asm/octeon/cvmx-spinlock.h create mode 100644 arch/mips/include/asm/octeon/cvmx-sysinfo.h create mode 100644 arch/mips/include/asm/octeon/cvmx.h create mode 100644 arch/mips/include/asm/octeon/octeon-feature.h create mode 100644 arch/mips/include/asm/octeon/octeon-model.h
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