aboutsummaryrefslogtreecommitdiff
path: root/arch/powerpc/lib/dma-noncoherent.c
AgeCommit message (Collapse)Author
2008-10-14powerpc: Fix DMA offset for non-coherent DMABenjamin Herrenschmidt
After Becky's work we can almost have different DMA offsets between on-chip devices and PCI. Almost because there's a problem with the non-coherent DMA code that basically ignores the programmed offset to use the global one for everything. This fixes it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-01powerpc: Prevent memory corruption due to cache invalidation of unaligned ↵Andrew Lewis
DMA buffer On PowerPC processors with non-coherent cache architectures the DMA subsystem calls invalidate_dcache_range() before performing a DMA read operation. If the address and length of the DMA buffer are not aligned to a cache-line boundary this can result in memory outside of the DMA buffer being invalidated in the cache. If this memory has an uncommitted store then the data will be lost and a subsequent read of that address will result in an old value being returned from main memory. Only when the DMA buffer starts on a cache-line boundary and is an exact mutiple of the cache-line size can invalidate_dcache_range() be called, otherwise flush_dcache_range() must be called. flush_dcache_range() will first flush uncommitted writes, and then invalidate the cache. Signed-off-by: Andrew Lewis <andrew-lewis at netspace.net.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-08[POWERPC] Remove use of 4level-fixup.h for ppc32David Gibson
For 32-bit systems, powerpc still relies on the 4level-fixup.h hack, to pretend that the generic pagetable handling stuff is 3-levels rather than 4. This patch removes this, instead using the newer pgtable-nopmd.h to handle the elision of both the pud and pmd pagetable levels (ppc32 pagetables are actually 2 levels). This removes a little extraneous code, and makes it more easily compared to the 64-bit pagetable code. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-07[POWERPC] 8xx: generic 8xx code arch/powerpc portVitaly Bordug
Including support for non-coherent cache, some mm-related things + relevant field in Kconfig and Makefiles. Also included rheap.o compilation if 8xx is defined. Non-coherent mapping were refined and renamed according to Cristoph Hellwig. Orphaned functions were cleaned up. [Also removed arch/ppc/kernel/dma-mapping.c, because otherwise compiling with ARCH=ppc for a non DMA-cache-coherent platform ends up with two copies of __dma_alloc_coherent etc. -- paulus.] Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>