| Age | Commit message (Collapse) | Author |
|---|
|
This patch enables coalesced MMIO for powerpc architecture.
It defines KVM_MMIO_PAGE_OFFSET and KVM_CAP_COALESCED_MMIO.
It enables the compilation of coalesced_mmio.c.
Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net>
Signed-off-by: Avi Kivity <avi@qumranet.com>
|
|
Obsoleted by the vmx-specific per-cpu list.
Signed-off-by: Avi Kivity <avi@qumranet.com>
|
|
If we don't enable FS_ENET we get build issues:
arch/powerpc/platforms/built-in.o: In function `ep8248e_mdio_probe':
arch/powerpc/platforms/82xx/ep8248e.c:129: undefined reference to `alloc_mdio_bitbang'
arch/powerpc/platforms/82xx/ep8248e.c:143: undefined reference to `mdiobus_register'
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
|
Manual merge of:
arch/powerpc/Kconfig
arch/powerpc/kernel/stacktrace.c
arch/powerpc/mm/slice.c
arch/ppc/kernel/smp.c
|
|
Conflicts:
arch/powerpc/Kconfig
arch/s390/kernel/time.c
arch/x86/kernel/apic_32.c
arch/x86/kernel/cpu/perfctr-watchdog.c
arch/x86/kernel/i8259_64.c
arch/x86/kernel/ldt.c
arch/x86/kernel/nmi_64.c
arch/x86/kernel/smpboot.c
arch/x86/xen/smp.c
include/asm-x86/hw_irq_32.h
include/asm-x86/hw_irq_64.h
include/asm-x86/mach-default/irq_vectors.h
include/asm-x86/mach-voyager/irq_vectors.h
include/asm-x86/smp.h
kernel/Makefile
Signed-off-by: Ingo Molnar <mingo@elte.hu>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'core/stacktrace' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
generic-ipi: powerpc/generic-ipi tree build failure
stacktrace: fix build failure on sparc64
stacktrace: export save_stack_trace[_tsk]
stacktrace: fix modular build, export print_stack_trace and save_stack_trace
backtrace: replace timer with tasklet + completions
stacktrace: add saved stack traces to backtrace self-test
stacktrace: print_stack_trace() cleanup
debugging: make stacktrace independent from DEBUG_KERNEL
stacktrace: don't crash on invalid stack trace structs
|
|
Manual fixup of:
arch/powerpc/Kconfig
|
|
The new dma_attrs support must only be enabled for 64 bits as it's not
been implemented for 32 bits yet.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
|
Push the sync below the secondary smp init hold loop and comment its purpose.
This should speed up boot by reducing global traffic during the single-threaded
portion of boot.
Signed-off-by: Sonny Rao <sonnyrao@us.ibm.com>
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
|
VSX loads and stores will take an alignment exception when the address
is not on a 4 byte boundary.
This add support for these alignment exceptions and will emulate the
requested load or store.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
|
giveup_vsx didn't save the FPU and VMX regsiters. Change it to be
like giveup_fpr/altivec which save these registers.
Also update call sites where FPU and VMX are already saved to use the
original giveup_vsx (renamed to __giveup_vsx).
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
|
Implement save_stack_trace_tsk on powerpc, so that we can run with
latencytop.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
|
It is okay for both _PAGE_GUARDED and _PAGE_COHERENT (G and M) to be set
in the same pte. In fact, even if that were not the case, there doesn't
seem to be any place where G is set without also setting I (_PAGE_NO_CACHE),
so the test for I is sufficient as a condition to clear _PAGE_COHERENT
when filling the hash table.
Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
|
Background from Maynard Johnson:
As of POWER6, a set of 32 common events is defined that must be
supported on all future POWER processors. The main impetus for this
compat set is the need to support partition migration, especially from
processor P(n) to processor P(n+1), where performance software that's
running in the new partition may not be knowledgeable about processor
P(n+1). If a performance tool determines it does not support the
physical processor, but is told (via the
PPC_FEATURE_PSERIES_PERFMON_COMPAT bit) that the processor supports
the notion of the PMU compat set, then the performance tool can
surface just those events to the user of the tool.
PPC_FEATURE_PSERIES_PERFMON_COMPAT indicates that the PMU supports at
least this basic subset of events which is compatible across POWER
processor lines.
Signed-off-by: Nathan Lynch <ntl@pobox.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
|
Adds a character driver for BSR support on IBM POWER systems including
Power5 and Power6. The BSR is an optional processor facility not currently
implemented by any other processors. It's primary purpose is fast large SMP
synchronization. More details on the BSR are in comments to the code which
follows. This patch adds BSR driver to pseries_defconfig.
Signed-off-by: Sonny Rao <sonnyrao@linux.vnet.ibm.com>
Signed-off-by: Joel Schopp <jschopp@austin.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
|
|
|
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'core/rodata' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
move BUG_TABLE into RODATA
|
|
Today's linux-next build (powerpc allmodconfig) failed like this:
ERROR: ".save_stack_trace" [tests/backtracetest.ko] undefined!
But save_stack_trace is exported in arch/powerpc/kernel/stacktrace.c
I couldn't figure it out until I noticed these earlier warnings:
arch/powerpc/kernel/stacktrace.c:47: warning: data definition has no type or storage class
arch/powerpc/kernel/stacktrace.c:47: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL'
arch/powerpc/kernel/stacktrace.c:47: warning: parameter names (without types) in function declaration
I applied the patch below.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: <linuxppc-dev@ozlabs.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
|
|
delete obsolete device-type property, delete model property
(use compatible property instead), prepend "fsl," to Freescale
specific properties. Add nodes to device trees that are missing them,
and fix broken property values in other trees.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
Remove the "uninitialized use" compile warning and avoid potential
runtime issue.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
There isn't any reason at this point that we can't build 82xx, 83xx & 86xx
support in with the other 6xx based boards. Twiddle the Kconfigs to allow
this.
This allows us to remove the machine type selection for related to 6xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
Publish the devices listed in dts under SOC as of_device for 85xx_cds
platform. The devices are needed by the 85xx EDAC driver.
Signed-off-by: Dave Jiang <djiang@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
For some reason long ago I decided that we should zero out the time base
when we calibrate the decrementer. The problem is that this can be
harmful in SMP systems where the firmware has already synchronized the
time bases on the various cores.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
Moved the pic initialization into its own common file and out of the board
code. Also fixed the OF reference counting on the mpic node.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
Initialize I2C pins on boards with CPM1/CPM2 controllers and document the
i2c bus in booting-without-of.
The boards don't have any I2C chips connected to the I2C bus, so unless
some external chips are connected to the boards, this code is just an
example of setting everything else up.
Signed-off-by: Jochen Friedrich <jochen@scram.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
Add support for the MPC8536 process and MPC8536DS reference board. The
MPC8536 is an e500v2 based SoC which eTSEC, USB, SATA, PCI, and PCIe.
The USB and SATA IP blocks are similiar to those on the PQ2 Pro SoCs and
thus use the same drivers.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
These issues were reported by Stephen Rothwell for another 85xx board
port and pointed out by Chen Gong as issues in the DS port.
* mpic OF node reference counting was off
* of_device_id struct should be marked as __initdata
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
udbg_putc is a *function pointer* that is initialized during
udbg_init_cpm. It might not be initialized properly when called from
udbg_putc_cpm(), so (recursively) call udbg_putc_cpm() directly.
Signed-off-by: Nye Liu <nyet@mrv.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
It adds the missing RTC node to tqm8548.dts and enables support for
I2C, DS1307 and LM75 in the default configuration.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
i8259 PIC is disabled on MPC8610HPCD, and ULi IDE is configured to use
PCI sideband interrupt that is specified in the device tree.
Current HPCD's device tree specify that IDE interrupt is low to high
sensitive, but in practice ULi IDE throws active-high interrupts (not
active-low as all normal PCI devices).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
Fix interrupt threading issue on pq2fads when running with CONFIG_PREEMPT_RT
Signed-off-by: Rune Torgersen <runet@innovsys.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
Rename MPIC label to mpic to match all other 85xx .dts and to fix compile
issue introduced by addition of the DMA node.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
Manual fixup of include/asm-powerpc/pgtable-ppc64.h
|
|
Add a interrupt host for the interrupt controller in the mpc5121ads cpld.
PCI interrupts are 0-7 the rest are 8-15 Touchscreen pendown irq is
hardwired to irq1 All other irqs are chained to irq0
Signed-off-by: John Rigby <jrigby@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
|
Move shared code from mpc5121_ads.c to new file mpc512x_shared.c
- mpc512x_find_ips_freq -> unchanged
- contents of mpc5121_ads_init_IRQ -> mpc512x_init_IRQ
- looking for fsl,mpc5121-ipic instead of fsl,ipic
- mpc5121_ads_declare_of_platform_devices -> mpc5121_declare_of_platform_devices
- and use compatible for lookup instead of node name
Add new generic board setup mpc5121_generic.c
Signed-off-by: John Rigby <jrigby@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
|
Plugs into the generic powerpc clock driver in
arch/powerpc/kernel/clock.c
The following subset of clk_interface is implemented:
clk_get, clk_put: get clock via name, release clock
clk_enable, clk_disable: enable or disable clock
clk_get_rate: get clock rate in Hz
clk_set_rate: stubbed
clk_round_rate: stubbed
clk_set_parent: NULL
clk_get_parent: NULL
Signed-off-by: John Rigby <jrigby@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
|
Current device tree is only bare bones. This patch adds nodes to make
it a complete tree for the MPC5121ads.
Added nodes include:
mbx - opengl coprocessor
nfc - nand flash controller
cpld-pic - on board cpld
rtc
clock - clock control
pmc - power management control
gpio
mscan - can module
i2c
axe - audio coprocessor
display - display interface unit
mdio
ethernet
usb
ioctl - pin config
pata
ac97 - PSC configured as AC97
pscfifo - psc fifo configuration
dma
pci
Fix typo in header changing MDS to ADS.
Add a compatible property of the form "fsl,mpc5121-..."
to nodes missing one.
Changed localbus compatible to fsl,mpc5121-localbus, this does
not break anything because the only code that uses it finds it
via the node name, not compatible.
Signed-off-by: John Rigby <jrigby@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
|
Fix for the following compiler warnings:
CC arch/powerpc/sysdev/bestcomm/bestcomm.o
arch/powerpc/sysdev/bestcomm/bestcomm.c: In function 'mpc52xx_bcom_probe':
arch/powerpc/sysdev/bestcomm/bestcomm.c:446:
warning: format '%08lx' expects type 'long unsigned int',
but argument 2 has type 'phys_addr_t'
CC arch/powerpc/sysdev/bestcomm/sram.o
arch/powerpc/sysdev/bestcomm/sram.c: In function 'bcom_sram_init':
arch/powerpc/sysdev/bestcomm/sram.c:89:
warning: format '%08lx' expects type 'long unsigned int',
but argument 3 has type 'phys_addr_t'
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
|
Simplify the interface for setting up bestcomm DMA to PSCs by adding
some helper functions. The helper function sets the correct values
for the initator and ipr values in PSC DMA tasks based on the PSC
number.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
|
This patch adds the still missing FDT nodes for the MSCAN devices for
the TQM52xx modules.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
|
Convert i2c-mpc to an of_platform driver. Utilize the code in
drivers/of-i2c.c to make i2c modules dynamically loadable by the
device tree.
Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
|
On MPC5200 the PCI target control register (PCITCR) @ MBAR + 0xD6C is
initialized with only bit 7 (Latrule disable) set. The 8-Bit write
combine timer (Bits 24..31) should be also set to a reasonable value
_greater zero_ (0x08 = default) since setting it to 0x00 leads to
_very poor_ performance as a PCI target since external burst won't be
possible at all.
Setting the WCT to 0x08 (cache-line size) leads to good overall perfomance.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
|
|
|
This patch enables 32bit PPC's (with 36bit physical address space, e.g.
IBM/AMCC PPC44x) to run with >= 4GB of RAM. Mostly its just replacing types
(unsigned long -> phys_addr_t).
Tested on an AMCC Katmai with 4GB of DDR2.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
Add the virtex and sam440ep platforms to the multiboard defconfig
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
Allow the Rev A Warp boards to boot from NAND.
Signed-off-by: Sean MacLennan <smaclennan@pikatech.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
This is some preliminary work to improve TLB management on SW loaded
TLB powerpc platforms. This introduce support for non-atomic PTE
operations in pgtable-ppc32.h and removes write back to the PTE from
the TLB miss handlers. In addition, the DSI interrupt code no longer
tries to fixup write permission, this is left to generic code, and
_PAGE_HWWRITE is gone.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
git://git.secretlab.ca/git/linux-2.6-virtex into 4xx-next
|
|
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
