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2010-02-17powerpc: Use lwsync for acquire barrier if CPU supports itAnton Blanchard
Nick Piggin discovered that lwsync barriers around locks were faster than isync on 970. That was a long time ago and I completely dropped the ball in testing his patches across other ppc64 processors. Turns out the idea helps on other chips. Using a microbenchmark that uses a lot of threads to contend on a global pthread mutex (and therefore a global futex), POWER6 improves 8% and POWER7 improves 2%. I checked POWER5 and while I couldn't measure an improvement, there was no regression. This patch uses the lwsync patching code to replace the isyncs with lwsyncs on CPUs that support the instruction. We were marking POWER3 and RS64 as lwsync capable but in reality they treat it as a full sync (ie slow). Remove the CPU_FTR_LWSYNC bit from these CPUs so they continue to use the faster isync method. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc: Fix lwsync patching code on 64bitAnton Blanchard
do_lwsync_fixups doesn't work on 64bit, we end up writing lwsyncs to the wrong addresses: 0:mon> di c0000001000bfacc c0000001000bfacc 7c2004ac lwsync Since the lwsync section has negative offsets we need to use a signed int pointer so we sign extend the value. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc: Rename LWSYNC_ON_SMP to PPC_RELEASE_BARRIER, ISYNC_ON_SMP to ↵Anton Blanchard
PPC_ACQUIRE_BARRIER For performance reasons we are about to change ISYNC_ON_SMP to sometimes be lwsync. Now that the macro name doesn't make sense, change it and LWSYNC_ON_SMP to better explain what the barriers are doing. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc: Convert open coded native hashtable bit lockAnton Blanchard
Now we have real bit locks use them instead of open coding it. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc: Use lwarx/ldarx hint in bit locksAnton Blanchard
This patch implements the lwarx/ldarx hint bit for bit locks. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc: Use lwarx hint in spinlocksAnton Blanchard
Recent versions of the PowerPC architecture added a hint bit to the larx instructions to differentiate between an atomic operation and a lock operation: > 0 Other programs might attempt to modify the word in storage addressed by EA > even if the subsequent Store Conditional succeeds. > > 1 Other programs will not attempt to modify the word in storage addressed by > EA until the program that has acquired the lock performs a subsequent store > releasing the lock. To avoid a binutils dependency this patch create macros for the extended lwarx format and uses it in the spinlock code. To test this change I used a simple test case that acquires and releases a global pthread mutex: pthread_mutex_lock(&mutex); pthread_mutex_unlock(&mutex); On a 32 core POWER6, running 32 test threads we spend almost all our time in the futex spinlock code: 94.37% perf [kernel] [k] ._raw_spin_lock | |--99.95%-- ._raw_spin_lock | | | |--63.29%-- .futex_wake | | | |--36.64%-- .futex_wait_setup Which is a good test for this patch. The results (in lock/unlock operations per second) are: before: 1538203 ops/sec after: 2189219 ops/sec An improvement of 42% A 32 core POWER7 improves even more: before: 1279529 ops/sec after: 2282076 ops/sec An improvement of 78% Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc: Convert global "BAD" interrupt to per cpu spuriousAnton Blanchard
I often get asked if BAD interrupts are really bad. On some boxes (eg IBM machines running a hypervisor) there are valid cases where are presented with an interrupt that is not for us. These cases are common enough to show up as thousands of BAD interrupts a day. Tone them down by calling them spurious. Since they can be a significant cause of OS jitter, we may as well log them per cpu so we know where they are occurring. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc: Add timer, performance monitor and machine check counts to ↵Anton Blanchard
/proc/interrupts With NO_HZ it is useful to know how often the decrementer is going off. The patch below adds an entry for it and also adds it into the /proc/stat summaries. While here, I added performance monitoring and machine check exceptions. I found it useful to keep an eye on the PMU exception rate when using the perf tool. Since it's possible to take a completely handled machine check on a System p box it also sounds like a good idea to keep a machine check summary. The event naming matches x86 to keep gratuitous differences to a minimum. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc: Remove whitespace in irq chip name fieldsAnton Blanchard
Now we use printf style alignment there is no need to manually space these fields. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc: Rework /proc/interruptsAnton Blanchard
On a large machine I noticed the columns of /proc/interrupts failed to line up with the header after CPU9. At sufficiently large numbers of CPUs it becomes impossible to line up the CPU number with the counts. While fixing this I noticed x86 has a number of updates that we may as well pull in. On PowerPC we currently omit an interrupt completely if there is no active handler, whereas on x86 it is printed if there is a non zero count. The x86 code also spaces the first column correctly based on nr_irqs. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc: Reduce footprint of xics_ipi_structAnton Blanchard
Right now we allocate a cacheline sized NR_CPUS array for xics IPI communication. Use DECLARE_PER_CPU_SHARED_ALIGNED to put it in percpu data in its own cacheline since it is written to by other cpus. On a kernel with NR_CPUS=1024, this saves quite a lot of memory: text data bss dec hex filename 8767779 2944260 1505724 13217763 c9afe3 vmlinux.irq_cpustat 8767555 2813444 1505724 13086723 c7b003 vmlinux.xics A saving of around 128kB. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc: Reduce footprint of irq_statAnton Blanchard
PowerPC is currently using asm-generic/hardirq.h which statically allocates an NR_CPUS irq_stat array. Switch to an arch specific implementation which uses per cpu data: On a kernel with NR_CPUS=1024, this saves quite a lot of memory: text data bss dec hex filename 8767938 2944132 1636796 13348866 cbb002 vmlinux.baseline 8767779 2944260 1505724 13217763 c9afe3 vmlinux.irq_cpustat A saving of around 128kB. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc/eeh: Fix a bug when pci structure is nullBreno Leitao
During a EEH recover, the pci_dev structure can be null, mainly if an eeh event is detected during cpi config operation. In this case, the pci_dev will not be known (and will be null) the kernel will crash with the following message: Unable to handle kernel paging request for data at address 0x000000a0 Faulting instruction address: 0xc00000000006b8b4 Oops: Kernel access of bad area, sig: 11 [#1] NIP [c00000000006b8b4] .eeh_event_handler+0x10c/0x1a0 LR [c00000000006b8a8] .eeh_event_handler+0x100/0x1a0 Call Trace: [c0000003a80dff00] [c00000000006b8a8] .eeh_event_handler+0x100/0x1a0 [c0000003a80dff90] [c000000000031f1c] .kernel_thread+0x54/0x70 The bug occurs because pci_name() tries to access a null pointer. This patch just guarantee that pci_name() is not called on Null pointers. Signed-off-by: Breno Leitao <leitao@linux.vnet.ibm.com> Signed-off-by: Linas Vepstas <linasvepstas@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17powerpc: Add coherent_dma_mask to mv64x60 devicesCorey Minyard
DMA ops requires that coherent_dma_mask be set properly for a device, but this was not being done for devices on the MV64x60 that use DMA. Both the serial and ethernet devices need this or they won't be able to allocate memory. Signed-off-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-17Merge commit 'origin/master' into nextBenjamin Herrenschmidt
2010-02-16powerpc/mpc5121: Add default config for MPC5121Anatolij Gustschin
Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-02-16powerpc/mpc5121: update mpc5121ads DTSAnatolij Gustschin
Collects several changes needed after applying previous mpc5121 platform and driver patches: - Add mpc5121 reset module node - Clean up and fix NAND description, remove unused properties here and correct NAND flash chip size. - Clean up I2C nodes: remove obsolete "cell-index" properties, add "fsl,preserve-clocking" property - Add I2C RTC node for m41t61 RTC - Add I2C nodes for AD7414 temperature sensor and AT24C32CD3 EEPROM - Fix compatible property in DMA node - Clean up CAN nodes, remove unused "cell-index" properties - Fix compatible property in DIU node - USB node changes: - use "fsl,mpc5121-usb2-dr" compatible property only - remove "port0" and "port1" properties as these are only used for multi-port host(MHP) module which is not available on MPC5121. - use 'fsl,invert-drvvbus' and 'fsl,invert-pwr-fault' in USB node for internal PHY to specify polarities of the appropriate port pins. Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-02-16powerpc/mpc5121: create and register NFC deviceAnatolij Gustschin
Instantiate NAND Flash Controller device if it's description is found in the device tree. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-02-16powerpc/mpc5121: Add machine restart supportAnatolij Gustschin
Add reset module registers representation and machine restart callback for mpc5121 platform. Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-02-16powerpc/mpc5121: avoid using arch_initcall for clock initAnatolij Gustschin
Move mpc5121_clk_init() call to platform init code so it won't get called on non-5121 platforms on a multiplatform kernel. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-02-14of: remove undefined request_OF_resource & release_OF_resourceGrant Likely
Neither request_OF_resource or release_OF_resource are defined anywhere. Remove the declarations. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Michal Simek <monstr@monstr.eu>
2010-02-14of: move definition of of_chosen into common code.Grant Likely
Rather than defining of_chosen in each arch, it can be defined for all in driver/of/base.c Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Michal Simek <monstr@monstr.eu>
2010-02-14of: remove unused extern reference to devtree_lockGrant Likely
Neither the powerpc nor the microblaze code use devtree_lock anymore. Remove the extern reference. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Michal Simek <monstr@monstr.eu>
2010-02-14of: put default string compare and #a/s-cell values into common headerGrant Likely
Most architectures don't need to change these. Put them into common code to eliminate some duplication Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Michal Simek <monstr@monstr.eu>
2010-02-14of/flattree: Don't assume HAVE_LMBJeremy Kerr
We don't always have lmb available, so make arches provide an early_init_dt_alloc_memory_arch() to handle the allocation of memory in the fdt code. When we don't have lmb.h included, we need asm/page.h for __va. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Michal Simek <monstr@monstr.eu>
2010-02-13powerpc/85xx: Fix SMP when "cpu-release-addr" is in lowmemPeter Tyser
Recent U-Boot commit 5ccd29c3679b3669b0bde5c501c1aa0f325a7acb caused the "cpu-release-addr" device tree property to contain the physical RAM location that secondary cores were spinning at. Previously, the "cpu-release-addr" property contained a value referencing the boot page translation address range of 0xfffffxxx, which then indirectly accessed RAM. The "cpu-release-addr" is currently ioremapped and the secondary cores kicked. However, due to the recent change in "cpu-release-addr", it sometimes points to a memory location in low memory that cannot be ioremapped. For example on a P2020-based board with 512MB of RAM the following error occurs on bootup: <...> mpic: requesting IPIs ... __ioremap(): phys addr 0x1ffff000 is RAM lr c05df9a0 Unable to handle kernel paging request for data at address 0x00000014 Faulting instruction address: 0xc05df9b0 Oops: Kernel access of bad area, sig: 11 [#1] SMP NR_CPUS=2 P2020 RDB Modules linked in: <... eventual kernel panic> Adding logic to conditionally ioremap or access memory directly resolves the issue. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Nate Case <ncase@xes-inc.com> Reported-by: Dipen Dudhat <B09055@freescale.com> Tested-by: Dipen Dudhat <B09055@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-02-13powerpc/85xx: Fix oops during MSI driver probe on MPC85xxMDS boardsAnton Vorontsov
MPC85xx chips report the wrong value in feature reporting register, and that causes the following oops: Unable to handle kernel paging request for data at address 0x00000c00 Faulting instruction address: 0xc0019294 Oops: Kernel access of bad area, sig: 11 [#1] MPC8569 MDS Modules linked in: [...] NIP [c0019294] mpic_set_irq_type+0x2f0/0x368 LR [c0019124] mpic_set_irq_type+0x180/0x368 Call Trace: [ef851d60] [c0019124] mpic_set_irq_type+0x180/0x368 (unreliable) [ef851d90] [c007958c] __irq_set_trigger+0x44/0xd4 [ef851db0] [c007b550] set_irq_type+0x40/0x7c [ef851dc0] [c0004a60] irq_create_of_mapping+0xb4/0x114 [ef851df0] [c0004af0] irq_of_parse_and_map+0x30/0x40 [ef851e20] [c0405678] fsl_of_msi_probe+0x1a0/0x328 [ef851e60] [c02e6438] of_platform_device_probe+0x5c/0x84 [...] This is because mpic_alloc() assigns wrong values to mpic->isu_{size,shift,mask}, and things eventually break when _mpic_irq_read() is trying to use them. This patch fixes the issue by enabling MPIC_BROKEN_FRR_NIRQS quirk. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-02-12powerpc/40x: Add support for PPC40x boards with > 512MB SDRAMStefan Roese
This patch adds support for boards with more that 512MByte RAM. Currently only 512MB of memory are enabled in the DCCR/ICCR real-mode cache control registers. This patch now enables caching in real-mode for 2GByte. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2010-02-10powerpc/44x: Add MTD support to katmai defconfigStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2010-02-10powerpc/44x: Update Glacier dtsStefan Roese
Sync Glacier dts with latest Canyonlands version: - Add l2 cache support - Add NDFC support - Add RTC support - Add AD7414 hwmon support - Change EMAC compatible node from emac4 to emac4sync and correct the register size - Add support for ISA holes on 4xx PCI/X/E (as done in Benjamin Herrenschmidt's patch for Canyonlands) - Add Crypto device node Signed-off-by: Stefan Roese <sr@denx.de> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2010-02-10powerpc/44x: Update Arches dtsStefan Roese
Sync Arches dts with latest Canyonlands version: - Add 16k FIFO size to supported EMAC nodes - Add next-level-cache property - Add Crypto device node Signed-off-by: Stefan Roese <sr@denx.de> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2010-02-10powerpc/44x: Add MTD support (NOR FLASH) to Katmai dtsStefan Roese
This patch adds NOR FLASH MTD support to the Katmai (440SPe) dts file. For this the OPB ranges address is mapped differently (base 0x00000000 -> 0xe0000000). This results in the address being identical to the lower 32bit of its physical address. This is needed for the MTD mapping to work correctly, since U-Boot will insert the physical addresses of the EBC chip selects into the EBC ranges property. This is the way its done in most other 4xx dts files as well. Additionally with a small whitespace cleanup. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2010-02-10powerpc/44x: Fix L2-cache support for 460GTStefan Roese
Also set L2C_CFG_RDBW on 460GT platforms and not only on 460EX. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2010-02-10powerpc: Fix address masking bug in hpte_need_flush()David Gibson
Commit f71dc176aa06359681c30ba6877ffccab6fba3a6 'Make hpte_need_flush() correctly mask for multiple page sizes' introduced bug, which is triggered when a kernel with a 64k base page size is run on a system whose hardware does not 64k hash PTEs. In this case, we emulate 64k pages with multiple 4k hash PTEs, however in hpte_need_flush() we incorrectly only mask the hardware page size from the address, instead of the logical page size. This causes things to go wrong when we later attempt to iterate through the hardware subpages of the logical page. This patch corrects the error. It has been tested on pSeries bare metal by Michael Neuling. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-09of/flattree: endian-convert members of boot_param_headerJeremy Kerr
The boot_param_header has big-endian fields, so change the types to __be32, and perform endian conversion when we access them. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-02-09of/flattree: use callback to setup initrd from /chosenJeremy Kerr
At present, the fdt code sets the kernel-wide initrd_start and initrd_end variables when parsing /chosen. On ARM, we only set these once the bootmem has been reserved. This change adds an arch hook to setup the initrd from the device tree: void early_init_dt_setup_initrd_arch(unsigned long start, unsigned long end); The arch-specific code can then setup the initrd however it likes. Compiled on powerpc, with CONFIG_BLK_DEV_INITRD=y and =n. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-02-09of/flattree: merge early_init_dt_scan_memory() common codeGrant Likely
Merge common code between PowerPC and Microblaze architectures. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Michal Simek <monstr@monstr.eu>
2010-02-09of: add 'of_' prefix to machine_is_compatible()Grant Likely
machine is compatible is an OF-specific call. It should have the of_ prefix to protect the global namespace. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Michal Simek <monstr@monstr.eu>
2010-02-09of: merge of_find_node_by_phandleJeremy Kerr
Merge common function between powerpc, sparc and microblaze. Code is identical for powerpc and microblaze, but adds a lock (and release) of the devtree_lock on sparc. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-02-09of: merge of_attach_node() & of_detach_node()Grant Likely
Merge common code between PowerPC and Microblaze Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-09powerpc: Only print clockevent settings onceAnton Blanchard
The clockevent multiplier and shift is useful information, but we only need to print it once. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-09powerpc: Clear MSR_RI during RTAS callsAnton Blanchard
RTAS should never cause an exception but if it does (for example accessing outside our RMO) then we might go a long way through the kernel before oopsing. If we unset MSR_RI we should at least stop things on exception exit. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-09powerpc: Remove trailing space in messagesFrans Pop
Signed-off-by: Frans Pop <elendil@planet.nl> Cc: linuxppc-dev@ozlabs.org Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-09powerpc: Make powerpc_firmware_features __read_mostlyAnton Blanchard
We use firmware_has_feature quite a lot these days, so it's worth putting powerpc_firmware_features into __read_mostly. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-09powerpc: Reformat SD_NODE_INIT to match x86Anton Blanchard
Clean up SD_NODE_INITS so we can easily compare it to x86. Similar to the work in 47734f89be0614b5acbd6a532390f9c72f019648 (sched: Clean up topology.h) Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-09powerpc: Convert mmu context allocator from idr to idaAnton Blanchard
We can use the much more lightweight ida allocator since we don't need the pointer storage idr provides. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-09powerpc: Add last sysfs file and dump of ftrace buffer to oops printoutAnton Blanchard
Add printout of last accessed sysfs file, added to x86 in ae87221d3ce49d9de1e43756da834fd0bf05a2ad (sysfs: crash debugging) Also add the notify_die hook that allows us to print out the ftrace buffer on oops. This is useful in conjunction with ftrace function_graph: Oops: Kernel access of bad area, sig: 11 [#1] SMP NR_CPUS=128 NUMA pSeries last sysfs file: /sys/class/net/tunl0/type Dumping ftrace buffer: ... 0) | .sysrq_handle_crash() { 0) 0.476 us | .hash_page(); 0) 0.488 us | .xmon_fault_handler(); 0) | .bad_page_fault() { 0) | .search_exception_tables() { 0) 0.590 us | .search_module_extables(); 0) 2.546 us | } 0) | .printk() { 0) | .vprintk() { 0) 0.488 us | ._raw_spin_lock(); 0) 0.572 us | .emit_log_char(); Showing the function graph of a sysrq-c crash. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-09powerpc: Reduce differences between pseries and ppc64 defconfigsAnton Blanchard
The pseries and ppc64 defconfigs have drifted apart over the years. Reduce some of the differences while still keeping the idea that the ppc64 defconfig is cross platform but enables fewer features than pseries, eg NR_CPUS is lower. Also enable a number of common adapters as modules. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-09powerpc/pseries: Quieten cede latency printkAnton Blanchard
The cede latency stuff is relatively new and we don't need to complain about it not working on older firmware. Signed-off-by: Anton Blanchard <anton@samba.org> Acked-by: Balbir Singh <balbir@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-09arch/powerpc: Fix continuation line formatsJoe Perches
String constants that are continued on subsequent lines with \ are not good. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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