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2005-11-01[PATCH] powerpc: Merge bitops.hDavid Gibson
Here's a revised version. This re-introduces the set_bits() function from ppc64, which I removed because I thought it was unused (it exists on no other arch). In fact it is used in the powermac interrupt code (but not on pSeries). - We use LARXL/STCXL macros to generate the right (32 or 64 bit) instructions, similar to LDL/STL from ppc_asm.h, used in fpu.S - ppc32 previously used a full "sync" barrier at the end of test_and_*_bit(), whereas ppc64 used an "isync". The merged version uses "isync", since I believe that's sufficient. - The ppc64 versions of then minix_*() bitmap functions have changed semantics. Previously on ppc64, these functions were big-endian (that is bit 0 was the LSB in the first 64-bit, big-endian word). On ppc32 (and x86, for that matter, they were little-endian. As far as I can tell, the big-endian usage was simply wrong - I guess no-one ever tried to use minixfs on ppc64. - On ppc32 find_next_bit() and find_next_zero_bit() are no longer inline (they were already out-of-line on ppc64). - For ppc64, sched_find_first_bit() has moved from mmu_context.h to the merged bitops. What it was doing in mmu_context.h in the first place, I have no idea. - The fls() function is now implemented using the cntlzw instruction on ppc64, instead of generic_fls(), as it already was on ppc32. - For ARCH=ppc, this patch requires adding arch/powerpc/lib to the arch/ppc/Makefile. This in turn requires some changes to arch/powerpc/lib/Makefile which didn't correctly handle ARCH=ppc. Built and running on G5. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-10-29[PATCH] ppc: prevent GCC 4 from generating AltiVec instructions in kernelLee Nicks
Depending on how GCC is built, GCC 4 may generate altivec instructions without user explicitly requesting vector operations in the code. Although this is a performance booster for user applications, it is a problem for kernel. This patch explicitly instruct GCC to NOT generate altivec instructions while building the kernel. Here are some test cases I ran. (1) build gcc 4.0.1 with '--with-cpu=7450 --enable-altivec --enable-cxx-flags=-mcpu=7450', and use this gcc to build kernel WITHOUT this kernel patch. Kernel fail to boot up on a 7450 board because of altivec instructions in kernel. (2) build gcc 4.0.1 with "--with-cpu=7450 --enable-altivec --enable-cxx-flags=-mcpu=7450", and use this gcc to build kernel WITH this kernel patch. Kernel boot up on a 7450 board without any problem. (3) build gcc 4.0.1 with "--with-cpu=750 --enable-cxx-flags=-mcpu=750", and use this gcc to build kernel with or without this kernel patch. Kernel boot up on a 7450 board without any problem. This patch should also work with GCC 3 or even earlier GCC 2.95.3. Signed-off-by: Lee Nicks <allinux@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-10-26ppc: Use the indirect_pci.c from arch/powerpc/sysdevPaul Mackerras
This defines a CONFIG_INDIRECT_PCI symbol to control whether it gets used or not, and fixes the Kconfig to select that symbol for platforms that need it. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-10-11ppc: Various minor compile fixesPaul Mackerras
This fixes up a variety of minor problems in compiling with ARCH=ppc arising from using the merged versions of various header files. A lot of the changes are just adding #include <asm/machdep.h> to files that use ppc_md or smp_ops_t. This also arranges for us to use semaphore.c, vecemu.c, vector.S and fpu.S from arch/powerpc/kernel when compiling with ARCH=ppc. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-21[PATCH] powerpc: merge the rest of arch/ppc*/oprofileStephen Rothwell
- merge common.c - move model specific files - remove stub Makefiles - clean up arch/ppc*/Makefile Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-11kbuild: rename prepare to archprepare to fix dependency chainSam Ravnborg
When introducing the generic asm-offsets.h support the dependency chain for the prepare targets was changed. All build scripts expecting include/asm/asm-offsets.h to be made when using the prepare target would broke. With the limited number of prepare targets left in arch Makefiles the trivial solution was to introduce a new arch specific target: archprepare The dependency chain looks like this now: prepare | +--> prepare0 | +--> archprepare | +--> scripts_basic +--> prepare1 | +---> prepare2 | +--> prepare3 So prepare 3 is processed before prepare2 etc. This guaantees that the asm symlink, version.h, scripts_basic are all updated before archprepare is processed. prepare0 which build the asm-offsets.h file will need the actions performed by archprepare. The head target is now named prepare, because users scripts will most likely use that target, but prepare-all has been kept for compatibility. Updated Documentation/kbuild/makefiles.txt. Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2005-09-10[PATCH] powerpc: Move include3 to arch/$(ARCH)/includeStephen Rothwell
This is less troublesome and makes more sense. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-09kbuild: m68k,parisc,ppc,ppc64,s390,xtensa use generic asm-offsets.h supportSam Ravnborg
Delete obsoleted parts form arch makefiles and rename to asm-offsets.h Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2005-08-30[PATCH] Create include/asm-powerpcStephen Rothwell
The ppc and ppc64 trees are hopefully going to merge over time, so this patch begins the process by creating a place for the merging of the header files. Create include/asm-powerpc (and move linkage.h into it from asm-{ppc,ppc64} since we don't like empty directories). Modify the ppc and ppc64 Makefiles to cope. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-06-25[PATCH] ppc32: Add support for Freescale e200 (Book-E) coreKumar Gala
The e200 core is a Book-E core (similar to e500) that has a unified L1 cache and is not cache coherent on the bus. The e200 core also adds a separate exception level for debug exceptions. Part of this patch helps to cleanup a few cases that are true for all Freescale Book-E parts, not just e500. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-05-01[PATCH] ppc32: refactor FPU exception handlingPaul Mackerras
Moved common FPU exception handling code out of head.S so it can be used by several of the sub-architectures that might of a full PowerPC FPU. Also, uses new CONFIG_PPC_FPU define to fix alignment exception handling for floating point load/store instructions to only occur if we have a hardware FPU. Signed-off-by: Jason McMullan <jason.mcmullan@timesys.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-16Linux-2.6.12-rc2Linus Torvalds
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!