aboutsummaryrefslogtreecommitdiff
path: root/arch/sh/kernel/cpu
AgeCommit message (Collapse)Author
2008-02-25sh: Rename SH-3 CCR3 reg to avoid synclink_cs clash.Paul Mundt
drivers/char/pcmcia/synclink_cs.c:284:1: warning: "CCR3" redefined In file included from include/asm/cache.h:13, from include/asm/processor_32.h:15, from include/asm/processor.h:60, from include/linux/prefetch.h:14, from include/linux/list.h:8, from include/linux/module.h:9, from drivers/char/pcmcia/synclink_cs.c:38: include/asm/cpu/cache.h:38:1: warning: this is the location of the previous definition Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-14sh: Get SH-5 caches working again post-unification.Paul Mundt
A number of cleanups to get the SH-5 cache management code in line with the rest of the SH backend. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-14sh: Shut up some trivial build warnings.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-14sh: add support for sh7366 processorMagnus Damm
This patch adds sh7366 cpu supports. Just the most basic things like interrupt controller, clocks and serial port are included at this point. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-14sh: remove maskreg irq codeMagnus Damm
This patch removes the maskreg irq code since it is not in use anymore. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-14sh: add probe support for new sh7722 cutMagnus Damm
This patch adds support for sh7722 devices with prr value 0xa1. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-08Fix container_of() usageAlexey Dobriyan
Using "attr" twice is not OK, because it effectively prohibits such container_of() on variables not named "attr". Signed-off-by: Alexey Dobriyan <adobriyan@sw.ru> Acked-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-01-28sh: Add OHCI and UDC platform devices for SH7720.Yoshihiro Shimoda
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: intc - remove default interrupt priority tablesMagnus Damm
This patch removes interrupt priority tables from the intc code. Optimal priority assignment varies with embedded application anyway, so keeping the interrupt priority tables together with cpu-specific code doesn't make sense. The function intc_set_priority() should be used instead to set the desired interrupt priority level. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: sh7712 clock supportAndrew Murray
This patch provides specific clock support for the SH7712. Signed-off-by: Andrew Murray <amurray@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Add support for SH7763 CPU subtype.Yoshihiro Shimoda
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Add support for SH7721 CPU subtype.Yoshihiro Shimoda
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Encode L1/L2 cache shape in auxvt.Paul Mundt
This adds in the L1I/L1D/L2 cache shape support to their respective entries in the ELF auxvt, based on the Alpha implementation. We use this on the userspace libc side for calculating a tightly packed SHMLBA amongst other things. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Support denormalization on SH-4 FPU.Stuart Menefy
Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Preparation for uncached jumps through PMB.Stuart Menefy
Presently most of the 29-bit physical parts do P1/P2 segmentation with a 1:1 cached/uncached mapping, jumping between the two to control the caching behaviour. This provides the basic infrastructure to maintain this behaviour on 32-bit physical parts that don't map P1/P2 at all, using a shiny new linker section and corresponding fixmap entry. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: GUSA atomic rollback support.Stuart Menefy
This implements kernel-level atomic rollback built on top of gUSA, as an alternative non-IRQ based atomicity method. This is generally a faster method for platforms that are lacking the LL/SC pairs that SH-4A and later use, and is only supportable on legacy cores. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: comment tidying for sh64->sh migration.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: syscall auditing for sh5, too.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: SH-2A FPU support.Paul Mundt
Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Add SH7263 CPU support.Paul Mundt
This adds support for the SH7263 (SH-2A) CPU. This particular CPU is a superset of SH7203, adding some additional peripheral blocks and hooking up additional (reserved on SH7203) vectors in the INTC block. No visibly nasty surprises, yet.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Add SH7203 CPU support.Paul Mundt
This adds support for the SH7203 (SH-2A) CPU. Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Bring the SH-5 FPU in line with the SH-4 FPU API.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Get the mach-cayman IRQ support building.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Switch SH-5 to use CONFIG_PAGE_OFFSET.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Stub in CPU subtype setup code for SH5-101/103.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Plug in simple SH-5 subtype probing.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Kill off do_NMI stub in SH-5 ex table.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Share bug/debug traps across _32 and _64.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move over and enable FPU support for SH-5.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move over sh64 switch_to and stack unwinder.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move over the SH-5 entry.S.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Disable initial cache flush on SH-5.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Don't reference UBC code in CPU init on sh64.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: imask IRQ depends on sh32.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-24Kobject: convert arch/* from kobject_unregister() to kobject_put()Greg Kroah-Hartman
There is no need for kobject_unregister() anymore, thanks to Kay's kobject cleanup changes, so replace all instances of it with kobject_put(). Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-01-24Kobject: change arch/sh/kernel/cpu/sh4/sq.c to use kobject_init_and_addGreg Kroah-Hartman
Stop using kobject_register, as this way we can control the sending of the uevent properly, after everything is properly initialized. Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-11-07sh: Kill off the remaining ST40 cruft.Paul Mundt
The ST40 stuff in-tree hasn't built for some time, and hasn't been updated for over 3 years. ST maintains their own out-of-tree changes and rebases occasionally, and that's ultimately where all of the ST40 users go anyways. In order for the ST40 code to be brought up to date most of the stuff removed in this changeset would have to be rewritten anyways, so there's very little benefit in keeping the remnants around either. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-11-07sh: Fix up kgdb-on-NMI branch target.Paul Mundt
This was all reworked some time ago, the old debug_enter was ripped out with everything going through a debug trap jump table instead. Kill off the debug_enter target and reference kgdb_handle_exception directly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-10-31sh: Kill off dead ipr_irq_demux().Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-10-30sh: Add resource of USBF for SH7722.Yoshihiro Shimoda
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-28sh: clkfwk: Support multi-level clock propagation.Stuart Menefy
Currently clock propagation only works for one level, but we have some clocks which need to propagate multiple levels, so make this recursive. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-27sh: Fix URAM start address on SH7785.Paul Mundt
Not all of the SH-X2 URAM blocks are mapped in the same place, SH7785 happens to map it on the opposite end of the address space from SH7722, correct the addresses. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-27sh: Use boot_cpu_data for CPU probe.Paul Mundt
This moves off of smp_processor_id() and only sets the probe information for the boot CPU directly. This will be copied out for the secondaries, so there's no reason to do this each time. This also allows for some header tidying. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-27sh: Fix plat_irq_setup_pins() for SH7785.Paul Mundt
There was some debug code left in here that caused the pin changes to never be hit. Kill that off, and all is well. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-27sh: Disable L2 reporting for present URAM only parts.Paul Mundt
The probing logic works for both URAM and L2, with no way to distinguish between the two. Disable the probing for now and let the CPU subtypes that have this in a real L2 configuration explicitly say so. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21sh: Initial SH-X3 SMP support.Paul Mundt
This adds basic support for SH-X3 SMP (4 CPUs). More IPI and cache debugging is necessary, mostly interfacing the d-cache coherency and the I-cache broadcast invalidates. Only for testing at present! Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21sh: Hook up the SH-X3 SMP intc register groups.Magnus Damm
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21sh: Bring SMP support back from the dead.Paul Mundt
There was a very preliminary bunch of SMP code scattered around for the SH7604 microcontrollers from way back when, and it has mostly suffered bitrot since then. With the tree already having been slowly getting prepped for SMP, this plugs in most of the remaining platform-independent bits. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21sh: intc - initial SMP support.Magnus Damm
This implements initial support for the SMP INTC (particularly INTC2) controllers. These are largely implemented as conventional blocks, with register sets grouped together at fixed strides relative to the CPU id. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21sh: Wire up URAM node on SH7785.Paul Mundt
Add SH7785 URAM as node 1, follows the SH-X3 change. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-12 01:50:33 +0000