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2009-03-20sh: disallow kexec virtual entryMagnus Damm
Older versions of kexec-tools has a zImage loader that passes a virtual address as entry point. The elf loader otoh it passes a physical address as entry point, and pages are always passed as physical addresses as well. Only allow physical addresses from now on. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-18sh: kexec jump: fix for ftrace.Paul Mundt
Save and restore ftrace state when returning from kexec jump in machine_kexec(). Follows the x86 change. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-18sh: kexec: Drop SR.BL bit toggling.Paul Mundt
For the time being, this creates far more problems than it solves, evident by the second local_irq_disable(). Kill all of this off and rely on IRQ disabling to protect against the VBR reload. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-18sh: add kexec jump supportMagnus Damm
Add kexec jump support to the SuperH architecture. Similar to the x86 implementation, with the following exceptions: - Instead of separating the assembly code flow into two parts for regular kexec and kexec jump we use a single code path. In the assembly snippet regular kexec is just kexec jump that never comes back. - Instead of using a swap page when moving data between pages the page copy assembly routine has been modified to exchange the data between the pages using registers. - We walk the page list twice in machine_kexec() to do and undo physical to virtual address conversion. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-18sh: rework kexec segment codeMagnus Damm
Rework the kexec code to avoid using P2SEG. Instead we walk the page list in machine_kexec() and convert the addresses from physical to virtual using C. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-18sh: simplify kexec vbr codeMagnus Damm
Setup the vbr register in machine_kexec(). This instead of passing values to the assembly snippet. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-17sh: Support for extended ASIDs on PTEAEX-capable SH-X3 cores.Paul Mundt
This adds support for extended ASIDs (up to 16-bits) on newer SH-X3 cores that implement the PTAEX register and respective functionality. Presently only the 65nm SH7786 (90nm only supports legacy 8-bit ASIDs). The main change is in how the PTE is written out when loading the entry in to the TLB, as well as in how the TLB entry is selectively flushed. While SH-X2 extended mode splits out the memory-mapped U and I-TLB data arrays for extra bits, extended ASID mode splits out the address arrays. While we don't use the memory-mapped data array access, the address array accesses are necessary for selective TLB flushes, so these are implemented newly and replace the generic SH-4 implementation. With this, TLB flushes in switch_mm() are almost non-existent on newer parts. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-16sh: clkfwk: Safer resume from hibernation.Francesco VIRLINZI
This patch fixes a possible problem in the resume from hibenration. It temporaneally saves the clk->rate on the stack to avoid any possible change during the clk->set_parent(..) call. Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-16sh: Consolidate SH-Mobile CPU code in arch/sh/kernel/cpu/shmobile/.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-16sh: SuperH Mobile suspend supportMagnus Damm
This patch contains CONFIG_SUSPEND support to the SuperH architecture. If enabled, SuperH Mobile processors will register their suspend callbacks during boot. To suspend, use "echo mem > /sys/power/state". To allow wakeup, make sure "/sys/device/platform/../power/wakeup" contains "enabled". Additional per-device driver patches are most likely needed. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-16sh: Fix compile error by operands(mov.l) in sh3/entry.SNobuhiro Iwamatsu
-- log -- arch/sh/kernel/cpu/sh4/../sh3/entry.S:365: Error: invalid operands for opcode make[4]: *** [arch/sh/kernel/cpu/sh4/../sh3/entry.o] Error 1 make[3]: *** [arch/sh/kernel/cpu/sh4] Error 2 -- log -- Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-16sh: Add OHCI USB support for SH7786Kuninori Morimoto
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-11sh: clkfwk: Add resume from hibernation support.Francesco VIRLINZI
This patch adds PM support to the clock framework. With this, resume from hibernation is properly supported. Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-11sh: clkfwk: add clk_set_parent/clk_get_parentFrancesco VIRLINZI
This patch adds the clk_set_parent/clk_get_parent routines to the sh clock framework. Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-10sh: Support fixed 32-bit PMB mappings from bootloader.Yoshihiro Shimoda
This provides a method for supporting fixed PMB mappings inherited from the bootloader, as an alternative to the dynamic PMB mapping currently used by the kernel. In the future these methods will be combined. P1/P2 area is handled like a regular 29-bit physical address, and local bus device are assigned P3 area addresses. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-10sh: hibernation supportMagnus Damm
Add Suspend-to-disk / swsusp / CONFIG_HIBERNATION support to the SuperH architecture. To suspend, use "swapon /dev/sda2; echo disk > /sys/power/state" To resume, pass "resume=/dev/sda2" on the kernel command line. The patch "pm: rework includes, remove arch ifdefs V2" is needed to allow the generic swsusp code to build properly. Hibernation is not enabled with this patch though, a patch setting ARCH_HIBERNATION_POSSIBLE will be submitted later. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7720.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7710.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7705.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh770x.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - mxg.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7619.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7206.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7201.Paul Mundt
Follow the conversions as per the other subtypes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7263.Paul Mundt
Convert over the SH7263 IRQ groups as well. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7203.Paul Mundt
Follow the conversions as per the other subtypes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: Restore RTC IRQ setting for SH7763 setup.Nobuhiro Iwamatsu
This was accidentally dropped in the multiple vectors per irq conversion. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7763Nobuhiro Iwamatsu
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh7763 hardware blocks such as RTC/SCIF/DMAC/GETHER/PCIC5/MMCIF/SIM/GPIO/USBF. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-03sh: Add support for SH7786 CPU subtype.Kuninori Morimoto
This adds preliminary support for the SH7786 CPU subtype. While this is a dual-core CPU, only UP is supported for now. L2 cache support is likewise not yet implemented. More information on this particular CPU subtype is available at: http://www.renesas.com/fmwk.jsp?cnt=sh7786_root.jsp&fp=/products/mpumcu/superh_family/sh7780_series/sh7786_group/ Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: Fix up SH-X3 general exception handler build.Paul Mundt
With the recent entry.S refactoring, the SH-X3 path had a mov.l for a register to register copy, resulting in: AS arch/sh/kernel/cpu/sh4/../sh3/entry.o arch/sh/kernel/cpu/sh4/../sh3/entry.S: Assembler messages: arch/sh/kernel/cpu/sh4/../sh3/entry.S:366: Error: invalid operands for opcode make[3]: *** [arch/sh/kernel/cpu/sh4/../sh3/entry.o] Error 1 Switch it over to a mov to fix it up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: multiple vectors per irq - sh7785Magnus Damm
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh7785 hardware blocks such as SCIF/DMAC/PCIC5/MMCIF/GDTA/FLCTL/GPIO Signed-off-by: Magnus Damm <damm@igel.co.jp> Tested-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: multiple vectors per irq - sh7780Magnus Damm
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh7780 hardware blocks such as SCIF/RTC/DMAC/PCIC5/MMCIF/FLCTL/GPIO Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: multiple vectors per irq - sh7750Magnus Damm
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh775x hardware blocks such as SCI/SCIF/RTC/DMAC/TMU2/REF. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: multiple vectors per irq - baseMagnus Damm
Instead of keeping the single vector -> single linux irq mapping we extend the intc code to support merging of vectors to a single linux irq. This helps processors such as sh7750, sh7780 and sh7785 which have more vectors than masking ability. With this patch in place we can modify the intc tables to use one irq per maskable irq source. Please note the following: - If multiple vectors share the same enum then only the first vector will be available as a linux irq. - Drivers may need to be rewritten to get pending irq source from the hardware block instead of irq number. This patch together with the sh7785 specific intc tables solves DMA controller irq issues related to buggy interrupt masking. Reported-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: prefetch early exception data on sh4/sh4a.Magnus Damm
Prefetch early exception data. There is unused space in our exception handler cache line anyway, so this is almost free. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: remove EXPEVT vector from stack on sh3/sh4/sh4aMagnus Damm
Remove EXPEVT vector from the stack, lookup_exception_vector() for sh3/sh4/sh4a is already using k2 to get the vector. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: rework register restore code for sh3/sh4/sh4aMagnus Damm
This patch reworks the sh3/sh4/sh4a register restore code in the following ways: - break out restore_regs() from restore_all() - the register saving order is unchanged - use restore_regs() in sh_bios_handler and restore_all - document the function Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: shared register saving code for sh3/sh4/sh4aMagnus Damm
This patch reworks the sh3/sh4/sh4a register saving code in the following ways: - break out prepare_stack_save_dsp() from handle_exception() - break out save_regs() from handle_exception() - the register saving order is unchanged - align new functions to fit in cache lines - separate exception code from interrupt code - keep main code flow in a single cache line per exception vector - use bsr/rts for regular functions (save pr first) - keep data in one shared cache line (exception_data) - document the functions - tie in the hp6xx code Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-12Merge branch 'sh/stable-updates'Paul Mundt
2009-02-12sh: Storage class should be before const qualifierTobias Klauser
The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: Don't enable GENERIC_TIME for the CMT clockevent driver yet.Paul Mundt
GENERIC_TIME still depends on the clocksource bits being there, which is presently not supported. This allows the CMT clockevent driver to be used alongside alternate system timers that do not yet provide a clocksource of their own (MTU2 and so on in the case of SH-2A). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: Fix up MTU2 support for SH7203.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: CMT platform data for sh7723/sh7722/sh7366/sh7343Magnus Damm
CMT platform data for SuperH Mobile sh7723/sh7722/sh7343/sh7366. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: fix no sys_timer caseMagnus Damm
Handle the case with a sys_timer set to NULL. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: tmu disable supportMagnus Damm
Add TMU disable support so we can use other clockevents. Also, setup the clockevent rating. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: rework clocksource and sched_clockMagnus Damm
Rework and simplify the sched_clock and clocksource code. Instead of registering the clocksource in a shared file we move it into the tmu driver. Also, add code to handle sched_clock in the case of no clocksource. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29Merge branch 'sh/stable-updates'Paul Mundt
2009-01-29sh: Fix up spurious syscall restarting.Paul Mundt
The T-bit manipulation for syscall error checking had the side effect of spuriously returning ERESTART* errno values over EINTR. So, we simplify the error checking a bit and leave the T-bit alone. Reported-by: Kaz Kojima <kkojima@rr.iij4u.or.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: fcnvds fix with denormalized numbers on SH-4 FPU.Carmelo AMOROSO
This fixes a bug in the FPU exception handler for the FCNVDS instruction. To get the register number the instruction is shifted right by 9, though it should be shifted right by 8. More information at ST Linux bugzilla: https://bugzilla.stlinux.com/show_bug.cgi?id=4892 Signed-off-by: Giuseppe Di Giore <giuseppe.di-giore@st.com> Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com> Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: Only reserve memory under CONFIG_ZERO_PAGE_OFFSET when it != 0.Christopher SMITH
Signed-off-by: Chris Smith <chris.smith@st.com> Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>