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path: root/arch/sparc64/kernel/pci_msi.c
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2008-09-10sparc64: Record OF device instead of device node pointer in pci_pbm_info.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-07-17sparc64/kernel/: make code staticAdrian Bunk
This patch makes the following needlessly global code static: - central.c: struct central_bus - central.c: struct fhc_list - central.c: apply_fhc_ranges() - central.c: apply_central_ranges() - ds.c: struct ds_states_template[] - pci_msi.c: sparc64_setup_msi_irq() - pci_msi.c: sparc64_teardown_msi_irq() - pci_sun4v.c: struct sun4v_dma_ops - sys_sparc32.c: cp_compat_stat64() Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-04-23[SPARC64]: NUMA device infrastructure.David S. Miller
Record and propagate NUMA information for devices. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-22[SPARC64]: Stop using __do_IRQ().David S. Miller
Invoke the desc->handle_irq directly in the top-level dispatch, just like other sophisticated ports. This will allow us to decrease the cost of the MSI queue dispatch. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-13[SPARC64]: virt_irq --> bucket mapping no longer necessaryDavid S. Miller
We used to need this to compute virt_irq --> ino, but that is no longer necessary. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-13[SPARC64]: Kill ugly __irq_ino() macro.David S. Miller
We have a place to stick INO information in the virt_to_real_irq_table[], which is currently only used for VIRQs. And that is readily accessible from the one __irq_ino() call site. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-13[SPARC64]: Consolidate MSI support code.David S. Miller
This also makes us use the MSI queues correctly. Each MSI queue is serviced by a normal sun4u/sun4v INO interrupt handler. This handler runs the MSI queue and dispatches the virtual interrupts indicated by arriving MSIs in that MSI queue. All of the common logic is placed in pci_msi.c, with callbacks to handle the PCI controller specific aspects of the operations. This common infrastructure will make it much easier to add MSG support. Signed-off-by: David S. Miller <davem@davemloft.net>