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path: root/arch/sparc64/kernel/setup.c
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2005-11-11[SPARC64]: Restore 2.4.x /proc/cpuinfo behavior for "ncpus probed" field.David S. Miller
Noticed by Tom 'spot' Callaway. Even on uniprocessor we always reported the number of physical cpus in the system via /proc/cpuinfo. But when this got changed to use num_possible_cpus() it always reads as "1" on uniprocessor. This change was unintentional. So scan the firmware device tree and count the number of cpu nodes, and report that, as we always did. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-11-07[SPARC64] mm: don't re-evaluate *ptepHugh Dickins
sparc64 prom_callback and new_setup_frame32 each operates on a user page table without holding lock, and no doubt they've good reason. But I'd feel more confident if they were to do a "pte = *ptep" and then operate on pte, rather than re-evaluating *ptep. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2005-10-04[SPARC64]: Replace cheetah+ code patching with variables.David S. Miller
Instead of code patching to handle the page size fields in the context registers, just use variables from which we get the proper values. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-09-28[SPARC64]: Move phys_base, kern_{base,size}, and sp_banks[] init to paging_initDavid S. Miller
Also, move prom_probe_memory() into arch/sparc64/mm/init.c Signed-off-by: David S. Miller <davem@davemloft.net>
2005-09-28[SPARC]: Declare paging_init() in asm/pgtable.hDavid S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-09-26[SPARC64]: Probe D/I/E-cache config and use.David S. Miller
At boot time, determine the D-cache, I-cache and E-cache size and line-size. Use them in cache flushes when appropriate. This change was motivated by discovering that the D-cache on UltraSparc-IIIi and later are 64K not 32K, and the flushes done by the Cheetah error handlers were assuming a 32K size. There are still some pieces of code that are hard coding things and will need to be fixed up at some point. While we're here, fix the D-cache and I-cache parity error handlers to run with interrupts disabled, and when the trap occurs at trap level > 1 log the event via a counter displayed in /proc/cpuinfo. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-09-23[SPARC64]: Kill unused variable in setup_arch()David S. Miller
'highest_paddr' is set, but never actually used. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-09-22[SPARC64]: Rewrite bootup sequence.David S. Miller
Instead of all of this cpu-specific code to remap the kernel to the correct location, use portable firmware calls to do this instead. What we do now is the following in position independant assembler: chosen_node = prom_finddevice("/chosen"); prom_mmu_ihandle_cache = prom_getint(chosen_node, "mmu"); vaddr = 4MB_ALIGN(current_text_addr()); prom_translate(vaddr, &paddr_high, &paddr_low, &mode); prom_boot_mapping_mode = mode; prom_boot_mapping_phys_high = paddr_high; prom_boot_mapping_phys_low = paddr_low; prom_map(-1, 8 * 1024 * 1024, KERNBASE, paddr_low); and that replaces the massive amount of by-hand TLB probing and programming we used to do here. The new code should also handle properly the case where the kernel is mapped at the correct address already (think: future kexec support). Consequently, the bulk of remap_kernel() dies as does the entirety of arch/sparc64/prom/map.S We try to share some strings in the PROM library with the ones used at bootup, and while we're here mark input strings to oplib.h routines with "const" when appropriate. There are many more simplifications now possible. For one thing, we can consolidate the two copies we now have of a lot of cpu setup code sitting in head.S and trampoline.S. This is a significant step towards CONFIG_DEBUG_PAGEALLOC support. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-08-29[SPARC64]: Eliminate irq_cpustat_t.David S. Miller
We can put the __softirq_pending mask in the cpudata, no need for the silly NR_CPUS array in kernel/softirq.c Signed-off-by: David S. Miller <davem@davemloft.net>
2005-08-29[SPARC64]: remove use of asm/segment.hKumar Gala
Removed sparc64 architecture specific users of asm/segment.h and asm-sparc64/segment.h itself Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-23[SPARC64]: Add boot option to force UltraSPARC-III P-Cache on.David S. Miller
Older UltraSPARC-III chips have a P-Cache bug that makes us disable it by default at boot time. However, this does hurt performance substantially, particularly with memcpy(), and the bug is _incredibly_ obscure. I have never seen it triggered in practice, ever. So provide a "-P" boot option that forces the P-Cache on. It taints the kernel, so if it does trigger and cause some data corruption or OOPS, we will find out in the logs that this option was on when it happened. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-04-16Linux-2.6.12-rc2Linus Torvalds
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!