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2006-03-20[SPARC64]: Fix pci_intmap_match().David S. Miller
When crawling up the PCI bus chain, stop at the first node that has an interrupt-map property before we hit the root. Also, if we use a bus interrupt-{map,mask} do not forget to update the 'intmask' pointer as we do for the 'intmap' pointer. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Two IRQ handling fixes.David S. Miller
On SUN4V, force IRQ state to idle in enable_irq(). However, I'm still not sure this is %100 correct. Call add_interrupt_randomness() on SUN4V too. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Use different cache sizing defaults on SUN4V.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Make lack of interrupt-map-* a fatal error on SUN4V.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Fix sun4v_intr_setenabled() return value check in enable_irq().David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Explicitly init *nregs to 0 in find_device_prom_node().David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Restrict PCI bus scanning on SUN4V.David S. Miller
On the PBM's first bus number, only allow device 0, function 0, to be poked at with PCI config space accesses. For some reason, this single device responds to all device numbers. Also, reduce the verbiage of the debugging log printk's for PCI cfg space accesses in the SUN4V PCI controller driver, so that it doesn't overwhelm the slow SUN4V hypervisor console. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Fix C-function name called by sun4v_mna trap code.David S. Miller
The trap code was calling itself :-) Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Don't printk() any messaages in sun4v_build_irq().David S. Miller
It just clutters up the log. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: INO is never fully specified already on SUN4V.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Kill sun4v_register_fault_status() on SMP.David S. Miller
That now gets done as a side effect of taking over the trap table from OBP. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: arch/sparc64/kernel/trampoline.S needs asm/cpudata.hDavid S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Make error codes available from sun4v_intr_get*().David S. Miller
And check for errors at call sites. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Pass correct ino to sun4v_intr_*().David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Use TRAP_LOAD_IRQ_WORK() in sun4v device mondo handler.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Fix IOMMU mapping on sun4v.David S. Miller
We should dynamically allocate the per-cpu pglist not use an in-kernel-image datum, since __pa() does not work on such addresses. Also, consistently use "u32" for devhandle. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Trim down sun4v IRQ translation kernel log message.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64] sunhv: Bug fixes.David S. Miller
Add udelay to polling console write loop, and increment the loop limit. Name the device "ttyHV" and pass that to add_preferred_console() when we're using hypervisor console. Kill sunhv_console_setup(), it's empty. Handle the case where we don't want to use hypervisor console. (ie. we have a head attached to a sun4v machine) Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Probe virtual-devices root node on sun4v.David S. Miller
This is where we learn how to get the interrupts for things like the hypervisor console device. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Kill spurious semicolon in sun4v_pci_init().David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Program IRQ registers correctly on sun4v.David S. Miller
Need to use hypervisor calls instead of direct register accesses. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Generic sun4v_build_irq().David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: More SUN4V PCI work.David S. Miller
Get bus range from child of PCI controller root nexus. This is actually a hack, but the PCI-E bridge sitting at the top of the PCI tree responds to PCI config cycles for every device number, so best to just ignore it for now. Preliminary PCI irq routing, needs lots of work. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Implement rest of generic interrupt hypervisor calls.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Move devino_to_sysino out of pci_sun4v_asm.SDavid S. Miller
It is not PCI specific, it is for all system interrupts. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Range check bus number in SUN4V PCI controller driver.David S. Miller
It has to be somewhere in the range from pbm->pci_first_busno to pbm->pci_last_busno, inclusive. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Missing 'return' statement in sun4v_pci_init().David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Implement basic pci_sun4v_scan_bus().David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: PCI-SUN4V fixes.David S. Miller
Clear top 8-bits of physical addresses in "ranges" property. This gives the actual physical address. Detect PBM-A vs. PBM-B by checking bit 0x40 of the devhandle. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Don't expect cfg space in PCI PBM ranges on SUN4V.David S. Miller
PCI cfg space is accessed transparently through the Hypervisor and not through direct cpu PIO operations. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Recognize "virtual-console" as input and output console device.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Do not try to synchronize %stick registers on SUN4V.David S. Miller
Writes by privileged code are not allowed. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Do not try to write to %tick or %stick on SUN4V.David S. Miller
Writes by privileged code are disallowed. The hypervisor manages the non-privileged bit. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Fix mondo queue allocations.David S. Miller
We have to use bootmem during init_IRQ and page alloc for sibling cpu calls. Also, fix incorrect hypervisor call return value checks in the hypervisor SMP cpu mondo send code. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Deal with PTE layout differences in SUN4V.David S. Miller
Yes, you heard it right, they changed the PTE layout for SUN4V. Ho hum... This is the simple and inefficient way to support this. It'll get optimized, don't worry. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Register kernel TSB with hypervisor.David S. Miller
We do this right after we take over the trap table from OBP. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Fix some SUN4V TLB miss bugs.David S. Miller
Code patching did not sign extend negative branch offsets correctly. Kernel TLB miss path needs patching and %g4 register preservation in order to handle SUN4V correctly. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Fix typo in sun4v_patch().David S. Miller
Second instruction offset is '4' not '3'. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Fix sun4v early bootup.David S. Miller
prom_sun4v_name should be "sun4v" not "SUNW,sun4v" Also, this is too early to make use of the .sun4v_Xinsn_patch code patching, so just check things manually. This gets us at least to prom_init() on Niagara. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Fetch bootup time of day from Hypervisor.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Simplify sun4v TLB handling using macros.David S. Miller
There was also a bug in sun4v_itlb_miss, it loaded the MMU Fault Status base into %g3 instead of %g2. This pointed out a fast path for TSB miss processing, since we have %g2 with the MMU Fault Status base, we can use that to quickly load up the PGD phys address. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Use ASI_SCRATCHPAD address 0x0 properly.David S. Miller
This is where the virtual address of the fault status area belongs. To set it up we don't make a hypervisor call, instead we call OBP's SUNW,set-trap-table with the real address of the fault status area as the second argument. And right before that call we write the virtual address into ASI_SCRATCHPAD vaddr 0x0. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: First cut at SUN4V PCI IOMMU handling.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Fix hypervisor call arg passing.David S. Miller
Function goes in %o5, args go in %o0 --> %o5. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Implement SUN4V PCI config space access.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: More SUN4V PCI controller work.David S. Miller
Add assembler file for PCI hypervisor calls. Setup basic skeleton of SUN4V PCI controller driver. Add 32-bit devhandle to PBM struct, as this is needed for hypervisor calls. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Beginnings of SUN4V PCI controller support.David S. Miller
Abstract out IOMMU operations so that we can have a different set of calls on sun4v, which needs to do things through hypervisor calls. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Fetch cpu mid properly on sun4v.David S. Miller
If there is a "cpuid" property, use that. Else suck it out of the top bits of the "reg" property. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: SUN4V memory exception trap handlers.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20[SPARC64]: Hypervisor TSB context switching.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net>
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