aboutsummaryrefslogtreecommitdiff
path: root/arch/x86/kernel/cpu
AgeCommit message (Collapse)Author
2008-01-30x86: add framework to disable CPUID bits on the command lineAndi Kleen
There are already various options to disable specific cpuid bits on the command line. They all use their own variable. Add a generic mask to make this easier in the future. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86, 32-bit: trim memory not covered by wb mtrrsJesse Barnes
On some machines, buggy BIOSes don't properly setup WB MTRRs to cover all available RAM, meaning the last few megs (or even gigs) of memory will be marked uncached. Since Linux tends to allocate from high memory addresses first, this causes the machine to be unusably slow as soon as the kernel starts really using memory (i.e. right around init time). This patch works around the problem by scanning the MTRRs at boot and figuring out whether the current end_pfn value (setup by early e820 code) goes beyond the highest WB MTRR range, and if so, trimming it to match. A fairly obnoxious KERN_WARNING is printed too, letting the user know that not all of their memory is available due to a likely BIOS bug. Something similar could be done on i386 if needed, but the boot ordering would be slightly different, since the MTRR code on i386 depends on the boot_cpu_data structure being setup. This patch fixes a bug in the last patch that caused the code to run on non-Intel machines (AMD machines apparently don't need it and it's untested on other non-Intel machines, so best keep it off). Further enhancements and fixes from: Yinghai Lu <Yinghai.Lu@Sun.COM> Andi Kleen <ak@suse.de> Signed-off-by: Jesse Barnes <jesse.barnes@intel.com> Tested-by: Justin Piszcz <jpiszcz@lucidpixels.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: use the correct cpuid method to detect MWAIT support for C statesAndi Kleen
Previously there was a AMD specific quirk to handle the case of AMD Fam10h MWAIT not supporting any C states. But it turns out that CPUID already has ways to detectly detect that without using special quirks. The new code simply checks if MWAIT supports at least C1 and doesn't use it if it doesn't. No more vendor specific code. Note this is does not simply clear MWAIT because MWAIT can be still useful even without C states. Credit goes to Ben Serebrin for pointing out the (nearly) obvious. Cc: "Andreas Herrmann" <andreas.herrmann3@amd.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: move MWAIT idle check to generic CPU initialization on 32-bitAndi Kleen
Previously it was only run for Intel CPUs, but AMD Fam10h implements MWAIT too. This matches 64bit behaviour. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: change NR_CPUS arrays in acpi-cpufreqtravis@sgi.com
Change the following static arrays sized by NR_CPUS to per_cpu data variables: acpi_cpufreq_data *drv_data[NR_CPUS] Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: change NR_CPUS arrays in powernow-k8travis@sgi.com
Change the following static arrays sized by NR_CPUS to per_cpu data variables: powernow_k8_data *powernow_data[NR_CPUS]; Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: change x86 machine check handler to use unlocked_ioctl insteadNikanth Karthikesan
The machine check handler registers ioctl handler that is called with the BKL held. Changing to register unlocked_ioctl instead. Also mce ioctl handler does not seem to need any lock protection. To: Andi Kleen <andi@firstfloor.org> Cc: linux-kernel@vger.kernel.org Cc: kernel-janitors@vger.kernel.org Change the Machine check handler to use unlocked_ioctl instead of ioctl handler. Also the mce ioctl handler does not need any lock protection. Signed-off-by: Nikanth Karthikesan <knikanth@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: remove CPU capabitilites printks on 32-bitAndi Kleen
I don't know of any case where they have been useful and they look ugly. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: move X86_FEATURE_CONSTANT_TSC into early cpu feature detectionAndi Kleen
Need this in the next patch in time_init and that happens early. This includes a minor fix on i386 where early_intel_workarounds() [which is now called early_init_intel] really executes early as the comments say. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: lfence fixIngo Molnar
LFENCE is available on XMM2 or higher Intel CPUs - not XMM or higher... this caused boot failures on XMM1 & !XMM1 capable CPUs. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: Implement support to synchronize RDTSC with LFENCE on Intel CPUsAndi Kleen
According to Intel RDTSC can be always synchronized with LFENCE on all current CPUs. Implement the necessary CPUID bit for that. It is unclear yet if that is true for all future CPUs too, but if there's another way the kernel can be always updated. Cc: asit.k.mallick@intel.com Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: implement support to synchronize RDTSC through MFENCE on AMD CPUsAndi Kleen
According to AMD RDTSC can be synchronized through MFENCE. Implement the necessary CPUID bit for that. Cc: andreas.herrmann3@amd.com Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: arch/x86/kernel/cpu/mcheck/k7.c checkpatch fixesAndrew Morton
#88: FILE: arch/x86/kernel/cpu/mcheck/k7.c:34: + rdmsr(MSR_IA32_MC0_STATUS+i*4,low, high); ^ ERROR: need space after that ',' (ctx:VxV) #142: FILE: arch/x86/kernel/cpu/mcheck/p4.c:170: + rdmsr(MSR_IA32_MC0_STATUS+i*4,low, high); ^ ERROR: need space after that ',' (ctx:VxV) #180: FILE: arch/x86/kernel/cpu/mcheck/p6.c:34: + rdmsr(MSR_IA32_MC0_STATUS+i*4,low, high); ^ total: 3 errors, 0 warnings, 114 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Please run checkpatch prior to sending patches Cc: Min Zhang <mzhang@mvista.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: arch/x86/kernel/cpu/mcheck/ checkpatch fixesAndrew Morton
#40: FILE: arch/x86/kernel/cpu/mcheck/k7.c:46: + snprintf (misc, 20, "[%08x%08x]", ahigh, alow); WARNING: line over 80 characters #45: FILE: arch/x86/kernel/cpu/mcheck/k7.c:50: + snprintf (addr, 24, " at %08x%08x", ahigh, alow); WARNING: no space between function name and open parenthesis '(' #45: FILE: arch/x86/kernel/cpu/mcheck/k7.c:50: + snprintf (addr, 24, " at %08x%08x", ahigh, alow); WARNING: no space between function name and open parenthesis '(' #48: FILE: arch/x86/kernel/cpu/mcheck/k7.c:52: + printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n", WARNING: no space between function name and open parenthesis '(' #65: FILE: arch/x86/kernel/cpu/mcheck/p4.c:161: + printk (KERN_DEBUG "CPU %d: EIP: %08x EFLAGS: %08x\n" WARNING: no space between function name and open parenthesis '(' #88: FILE: arch/x86/kernel/cpu/mcheck/p4.c:182: + snprintf (misc, 20, "[%08x%08x]", ahigh, alow); WARNING: line over 80 characters #93: FILE: arch/x86/kernel/cpu/mcheck/p4.c:186: + snprintf (addr, 24, " at %08x%08x", ahigh, alow); WARNING: no space between function name and open parenthesis '(' #93: FILE: arch/x86/kernel/cpu/mcheck/p4.c:186: + snprintf (addr, 24, " at %08x%08x", ahigh, alow); WARNING: no space between function name and open parenthesis '(' #96: FILE: arch/x86/kernel/cpu/mcheck/p4.c:188: + printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n", WARNING: no space between function name and open parenthesis '(' #120: FILE: arch/x86/kernel/cpu/mcheck/p6.c:46: + snprintf (misc, 20, "[%08x%08x]", ahigh, alow); WARNING: line over 80 characters #125: FILE: arch/x86/kernel/cpu/mcheck/p6.c:50: + snprintf (addr, 24, " at %08x%08x", ahigh, alow); WARNING: no space between function name and open parenthesis '(' #125: FILE: arch/x86/kernel/cpu/mcheck/p6.c:50: + snprintf (addr, 24, " at %08x%08x", ahigh, alow); WARNING: no space between function name and open parenthesis '(' #128: FILE: arch/x86/kernel/cpu/mcheck/p6.c:52: + printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n", total: 0 errors, 13 warnings, 100 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Please run checkpatch prior to sending patches Cc: Min Zhang <mzhang@mvista.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30arch/x86/kernel/cpu/mcheck/p4.c: cleanupsMin Zhang
SMP, the machine check exception dispatches all logical processors within a physical package to the machine-check exception handler, so the printk within each handler outputs concurrently and makes the output unreadable. Refer to Intel system programming guide Part 1 Section 7.8.5 http://developer.intel.com/design/processor/manuals/253668.pdf Signed-off-by: Min Zhang <mzhang@mvista.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: move definitions to processor.hGlauber de Oliveira Costa
This patch moves definitions that are present in only one of the files (between processor_32.h and processor_64.h), to processor.h. They're mostly structures and function definitions. Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: unify x86_cpuinfo struct.Glauber de Oliveira Costa
x86_cpuinfo is one more to the family of "not fundamentally different" structs. It's unified in processor.h, with very specific fields enclosed around ifdefs. Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86-64: honor notify_die() returning NOTIFY_STOPJan Beulich
This requires making die() return a value, making its callers honor this (and be prepared that it may return), and making oops_end() have two additional parameters. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30mcheck mce_64: mce_read_sem to mutexDaniel Walker
Converted to a mutex, and changed the name to mce_read_mutex. Signed-off-by: Daniel Walker <dwalker@mvista.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: remove all definitions with fastcallHarvey Harrison
fastcall is always defined to be empty, remove it from arch/x86 Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: unify struct desc_ptrGlauber de Oliveira Costa
This patch unifies struct desc_ptr between i386 and x86_64. They can be expressed in the exact same way in C code, only having to change the name of one of them. As Xgt_desc_struct is ugly and big, this is the one that goes away. There's also a padding field in i386, but it is not really needed in the C structure definition. Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: unify desc_structGlauber de Oliveira Costa
This patch aims to make the access of struct desc_struct variables equal across architectures. In this patch, I unify the i386 and x86_64 versions under an anonymous union, keeping the way they are accessed untouched (a and b for 32-bit code, individual bit-fields for 64-bit). This solution is not beautiful, but will allow us to integrate common code that differed by the way descriptors were used. This is to be viewed incrementally. There's simply too much code to be fixed at once. In the future, goal is to set up in a single way of acessing the desc_struct fields. Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86, ptrace: support for branch trace store(BTS)Markus Metzger
Resend using different mail client Changes to the last version: - split implementation into two layers: ds/bts and ptrace - renamed TIF's - save/restore ds save area msr in __switch_to_xtra() - make block-stepping only look at BTF bit Signed-off-by: Markus Metzger <markus.t.metzger@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: use generic register name in the thread and tss structuresH. Peter Anvin
This changes size-specific register names (eip/rip, esp/rsp, etc.) to generic names in the thread and tss structures. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: rename the struct pt_regs members for 32/64-bit consistencyH. Peter Anvin
We have a lot of code which differs only by the naming of specific members of structures that contain registers. In order to enable additional unifications, this patch drops the e- or r- size prefix from the register names in struct pt_regs, and drops the x- prefixes for segment registers on the 32-bit side. This patch also performs the equivalent renames in some additional places that might be candidates for unification in the future. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: add set/clear_cpu_cap operationsJeremy Fitzhardinge
The patch to suppress bitops-related warnings added a pile of ugly casts. Many of these were related to the management of x86 CPU capabilities. Clean these up by adding specific set/clear_cpu_cap macros, and use them consistently. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: fall back on interrupt disable in cmpxchg8b on 80386 and 80486Mathieu Desnoyers
Actually, on 386, cmpxchg and cmpxchg_local fall back on cmpxchg_386_u8/16/32: it disables interruptions around non atomic updates to mimic the cmpxchg behavior. The comment: /* Poor man's cmpxchg for 386. Unsuitable for SMP */ already present in cmpxchg_386_u32 tells much about how this cmpxchg implementation should not be used in a SMP context. However, the cmpxchg_local can perfectly use this fallback, since it only needs to be atomic wrt the local cpu. This patch adds a cmpxchg_486_u64 and uses it as a fallback for cmpxchg64 and cmpxchg64_local on 80386 and 80486. Q: but why is it called cmpxchg_486 when the other functions are called A: Because the standard cmpxchg is missing only on 386, but cmpxchg8b is missing both on 386 and 486. Citing Intel's Instruction set reference: cmpxchg: This instruction is not supported on Intel processors earlier than the Intel486 processors. cmpxchg8b: This instruction encoding is not supported on Intel processors earlier than the Pentium processors. Q: What's the reason to have cmpxchg64_local on 32 bit architectures? Without that need all this would just be a few simple defines. A: cmpxchg64_local on 32 bits architectures takes unsigned long long parameters, but cmpxchg_local only takes longs. Since we have cmpxchg8b to execute a 8 byte cmpxchg atomically on pentium and +, it makes sense to provide a flavor of cmpxchg and cmpxchg_local using this instruction. Also, for 32 bits architectures lacking the 64 bits atomic cmpxchg, it makes sense _not_ to define cmpxchg64 while cmpxchg could still be available. Moreover, the fallback for cmpxchg8b on i386 for 386 and 486 is a However, cmpxchg64_local will be emulated by disabling interrupts on all architectures where it is not supported atomically. Therefore, we *could* turn cmpxchg64_local into a cmpxchg_local, but it would make the 386/486 fallbacks ugly, make its design different from cmpxchg/cmpxchg64 (which really depends on atomic operations and cannot be emulated) and require the __cmpxchg_local to be expressed as a macro rather than an inline function so the parameters would not be fixed to unsigned long long in every case. So I think cmpxchg64_local makes sense there, but I am open to suggestions. Q: Are there any callers? A: I am actually using it in LTTng in my timestamping code. I use it to work around CPUs with asynchronous TSCs. I need to update 64 bits values atomically on this 32 bits architecture. Changelog: - Ran though checkpatch. Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: extended interrupt LVT support for AMD BarcelonaRobert Richter
Also macro definitions in apicdef.h has been updated. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86: use CR0 defines.Dave Jones
Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-01-30x86: mtrr use type bool [RESEND AGAIN]Paul Jimenez
This is a janitorish patch to 1) remove private TRUE/FALSE #def's in favor of using the standard enum from linux/stddef.h and 2) switch the variables holding those values to type 'bool' (from linux/types.h) since it both seems more appropriate and allows for potentially better optimization. As a truly minor aside, I removed a couple of comments documenting a 'do_safe' parameter that seems to no longer exist. Signed-off-by: Paul Jimenez <pj@place.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30x86 mce_64.c: make struct mcelog staticAdrian Bunk
This patch makes the needlessly global struct mcelog static. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-01-30x86: nuke a ton of unused exportsThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-01-30kobj: fix threshold_init_device/kobject_uevent_env oopsGreg KH
the logic in this function is just crazy. It's recursive, but we can circumvent the creation for the kobject and whole creation of the threshold_block if some conditions are met. That's why we see the allocate_threshold_blocks so many times in the callstack, yet only a few kobjects created. Then we blow up in kobject_uevent_env() on the first debug printk. Which means that we are just passing in garbage. Man, this is one time that comments in code would have been very nice to have, and why forward goto's into major code blocks are just evil... Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-25cpu-hotplug: replace lock_cpu_hotplug() with get_online_cpus()Gautham R Shenoy
Replace all lock_cpu_hotplug/unlock_cpu_hotplug from the kernel and use get_online_cpus and put_online_cpus instead as it highlights the refcount semantics in these operations. The new API guarantees protection against the cpu-hotplug operation, but it doesn't guarantee serialized access to any of the local data structures. Hence the changes needs to be reviewed. In case of pseries_add_processor/pseries_remove_processor, use cpu_maps_update_begin()/cpu_maps_update_done() as we're modifying the cpu_present_map there. Signed-off-by: Gautham R Shenoy <ego@in.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-01-24Driver core: change sysdev classes to use dynamic kobject namesKay Sievers
All kobjects require a dynamically allocated name now. We no longer need to keep track if the name is statically assigned, we can just unconditionally free() all kobject names on cleanup. Signed-off-by: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-01-24Kobject: convert arch/* from kobject_unregister() to kobject_put()Greg Kroah-Hartman
There is no need for kobject_unregister() anymore, thanks to Kay's kobject cleanup changes, so replace all instances of it with kobject_put(). Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-01-24Kobject: change arch/x86/kernel/cpu/mcheck/mce_amd_64.c to use ↵Greg Kroah-Hartman
kobject_init_and_add Stop using kobject_register, as this way we can control the sending of the uevent properly, after everything is properly initialized. Cc: Jacob Shin <jacob.shin@amd.com> Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-01-24Kobject: change arch/x86/kernel/cpu/mcheck/mce_amd_64.c to use ↵Greg Kroah-Hartman
kobject_create_and_add Make this kobject dynamic and convert it to not use kobject_register, which is going away. Cc: Jacob Shin <jacob.shin@amd.com> Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-01-24Kobject: change arch/x86/kernel/cpu/intel_cacheinfo.c to use ↵Greg Kroah-Hartman
kobject_init_and_add Stop using kobject_register, as this way we can control the sending of the uevent properly, after everything is properly initialized. Cc: Ashok Raj <ashok.raj@intel.com> Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-12-21x86: intel_cacheinfo.c: cpu cache info entry for Intel TolapaiJason Gaston
This patch adds a cpu cache info entry for the Intel Tolapai cpu. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2007-12-04x86: free_cache_attributes() section fixAdrian Bunk
free_cache_attributes() must be __cpuinit since it calls the __cpuinit cache_remove_shared_cpu_map(). This patch fixes the following section mismatch reported by Chris Clayton: ... WARNING: vmlinux.o(.text+0x90b6): Section mismatch: reference to .init.text:cache_remove_shared_cpu_map (between 'free_cache_attributes' and 'show_level') ... Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2007-11-20Revert "speedstep-lib.c: fix frequency multiplier for Pentium4 models 0&1"Zhao Yakui
For P4 model < 2, The MSR_FBC_REGISTER_ID ratio is undefined. Revert the commit that was added to handle that case, as it results in random MHz displayed. Something else will have to be done to properly handle model < 2. //commit 3e4159ab35c88aef5e063ba78796b277b762a30a //Author: matthias.christian <matthias.christian> //Date: Sat Feb 5 23:09:38 2005 +0000 // // [PATCH] speedstep-lib.c: fix frequency multiplier for Pentium4 models 0&1 // // The Pentium4 models 0&1 have a longer MSR_EBC_FREQUENCY_ID register as the // models 2&3, so the bit shift must be bigger. // // Signed-off-by: Matthias-Christian Ott <matthias.christian@tiscali.de> // Signed-off-by: Dominik Brodowski <linux@brodo.de> // Signed-off-by: Andrew Morton <akpm@osdl.org> // Signed-off-by: Linus Torvalds <torvalds@osdl.org> // // BKrev: 42055232eWM-NgjhZVir44mp5GXktQ http://bugzilla.kernel.org/show_bug.cgi?id=7186 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2007-11-17x86: show cpuinfo only for online CPUsAndreas Herrmann
Fix regressions introduced with 92cb7612aee39642d109b8d935ad265e602c0563. It can happen that cpuinfo is displayed for CPUs that are not online or even worse for CPUs not present at all. As an example, following was shown for a "second" CPU of a single core K8 variant: processor : 0 vendor_id : unknown cpu family : 0 model : 0 model name : unknown stepping : 0 cache size : 0 KB fpu : yes fpu_exception : yes cpuid level : 0 wp : yes flags : bogomips : 0.00 clflush size : 0 cache_alignment : 0 address sizes : 0 bits physical, 0 bits virtual power management: Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2007-11-17x86: fix cpu-hotplug regressionAndreas Herrmann
Commit d435d862baca3e25e5eec236762a43251b1e7ffc ("cpu hotplug: mce: fix cpu hotplug error handling") changed the error handling in mce_cpu_callback. In cases where not all CPUs are brought up during boot (e.g. using maxcpus and additional_cpus parameters) mce_cpu_callback now returns NOTFIY_BAD because for such CPUs cpu_data is not completely filled when the notifier is called. Thus mce_create_device fails right at its beginning: if (!mce_available(&cpu_data[cpu])) return -EIO; As a quick fix I suggest to check boot_cpu_data for MCE. To reproduce this regression: (1) boot with maxcpus=2 addtional_cpus=2 on a 4 CPU x86-64 system (2) # echo 1 >/sys/devices/system/cpu/cpu2/online -bash: echo: write error: Invalid argument dmesg shows: _cpu_up: attempt to bring up CPU 2 failed Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2007-11-16Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreqLinus Torvalds
* master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq: [CPUFREQ] Fix up whitespace in conservative governor. [CPUFREQ] Make cpufreq_conservative handle out-of-sync events properly [CPUFREQ] architectural pstate driver for powernow-k8
2007-11-14Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/x86Linus Torvalds
* git://git.kernel.org/pub/scm/linux/kernel/git/sam/x86: x86: enable "make ARCH=x86" x86: do not use $(ARCH) when not needed kconfig: use $K64BIT to set 64BIT with all*config targets kconfig: add helper to set config symbol from environment variable kconfig: factor out code in confdata.c x86: move the rest of the menu's to Kconfig x86: move all simple arch settings to Kconfig x86: copy x86_64 specific Kconfig symbols to Kconfig.i386 x86: add X86_64 dependency to x86_64 specific symbols in Kconfig.x86_64 x86: add X86_32 dependency to i386 specific symbols in Kconfig.i386 x86: arch/x86/Kconfig.cpu unification x86: start unification of arch/x86/Kconfig.* x86: unification of cfufreq/Kconfig
2007-11-14x86: don't call mce_create_device on CPU_UP_PREPAREAndreas Herrmann
Fix regression introduced with d435d862baca3e25e5eec236762a43251b1e7ffc ("cpu hotplug: mce: fix cpu hotplug error handling"). A CPU which was not brought up during boot (using maxcpus and additional_cpus parameters) couldn't be onlined anymore. For such a CPU it seemed that MCE was not supported during CPU_UP_PREPARE-time which caused mce_cpu_callback to return NOTIFY_BAD to notifier_call_chain. To fix this we: - call mce_create_device for CPU_ONLINE event (instead of CPU_UP_PREPARE), - avoid mce_remove_device() for the CPU that is not correctly initialized by mce_create_device() failure, - make mce_cpu_callback always return NOTIFY_OK for CPU_ONLINE event. Because CPU_ONLINE callback return value is always ignored. [akinobu.mita@gmail.com: avoid mce_remove_device() for not initialized device] [akinobu.mita@gmail.com: make mce_cpu_callback always return NOTIFY_OK] Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-11-12x86: unification of cfufreq/KconfigSam Ravnborg
Merge the two Kconfig files to a single file. Checked using make allmodconfig for x86_64. No changes in build. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Adrian Bunk <bunk@kernel.org> Cc: Dave Jones <davej@codemonkey.org.uk>
2007-11-09x86: make ipi_handler() always definedIngo Molnar
prepare for up_smp_call_function() to ensure that the 'func' pointer is unused. (which is related to a KVM build fix) Signed-off-by: Ingo Molnar <mingo@elte.hu>
2007-10-30x86: additional CPUID strings; fix strings for AMD-ecxH. Peter Anvin
Additional CPUID strings (sse4_1, sse4_2, sse5, skinit, wdt); fix the positioning of the AMD ecx strings (cr8_legacy was duplicated under two different names, so the alignment of all the other strings were off by one.) Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 10:01:52 +0000