Age | Commit message (Expand) | Author |
---|---|---|
2008-01-30 | x86: c_p_a() make it more robust against use of PAT bits | Andi Kleen |
2008-01-30 | x86: c_p_a() fix: reorder TLB / cache flushes to follow Intel recommendation | Andi Kleen |
2008-01-30 | x86: cpa: remove unnecessary masking of address | Andi Kleen |
2008-01-30 | x86: cpa: use wbinvd() macro instead of inline assembly in 64bit c_p_a() | Andi Kleen |
2008-01-30 | x86: return the page table level in lookup_address() | Ingo Molnar |
2008-01-30 | x86: clean up arch/x86/mm/pageattr_64.c | Ingo Molnar |
2007-10-22 | Intel IOMMU: clflush_cache_range now takes size param | Keshavamurthy, Anil S |
2007-10-19 | x86: fix global_flush_tlb() bug | Ingo Molnar |
2007-10-17 | x86: Create clflush() inline, remove hardcoded wbinvd | H. Peter Anvin |
2007-10-17 | x86: NX bit handling in change_page_attr() | Huang, Ying |
2007-10-11 | x86_64: move mm | Thomas Gleixner |