aboutsummaryrefslogtreecommitdiff
path: root/arch/x86_64
AgeCommit message (Collapse)Author
2006-03-25[PATCH] x86_64: Add cpu_relax() to busy loops in PM timer codeAndi Kleen
Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Report SIGSEGV for IRET faultsAndi Kleen
tcsh is not happy with the -9999 error code. Suggested by Ernie Petrides Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Remove bogus special case in AMD core parsing.Andi Kleen
No need to restrict to power of two here. TBD needs more double checking Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: group memnodemap and memnodeshift in a memnode structureEric Dumazet
pfn_to_page() and others need to access both memnode_shift and the very first bytes of memnodemap[]. If we force memnode_shift to be just before the memnodemap array, we can reduce the memory footprint to one cache line instead of two for most setups. This patch introduce a 'memnode' structure where shift and map[] are carefully placed. Signed-off-by: Eric Dumazet <dada1@cosmosbay.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Eliminate register_die_notifier symbol exportedKevin Winchester
register_die_notifier is exported twice, once in traps.c and once in x8664_ksyms.c. This results in a warning on build. Signed-off-by: Kevin Winchester <kwin@ns.sympatico.ca> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Search K8 devices on more devices.Navin Boppuri
arch/x86_64/kernel/aperture.c: The search for the AGP bridge has been extended to search for all the 256 buses instead of the first 32. This is required since on a some systems, the bridge may be located on a bus much farther than the first 32. By searching all 256 buses, we guarantee that the search succeeds on such systems. arch/x86_64/kernel/pci-gart.c: The search for the Northbridge is not limited to just bus 0 anymore. This is required because on certain systems, we may not find one on bus 0. Signed-off-by: Navin Boppuri <navin.boppuri@newisys.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Make GART_IOMMU kconfig help text more specific (trivial)Jon Mason
Have the GART_IOMMU help text specify that this is the hardware IOMMU in amd64 processors. This will be significant if/when other IOMMUs are added to the x86-64 architecture. :-) Also, note that the previous help text stated that IOMMU was needed for >3GB memory instead of >4GB. This is fixed in the newer version. Signed-off-by: Jon Mason <jdmason@us.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Remove CONFIG_UNORDERED_IOAndi Kleen
It was a failed experiment - all benchmarks done with it on both AMD and Intel showed it was a loss. That was probably because the store buffers of the CPUs for write combining traffic weren't large enough. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] i386/x86-64: List Intel LaGrange AKA SMX in /proc/cpuinfoAndi Kleen
Spec just got published so we know the CPUID bit. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: free_bootmem_node needs __pa in allocate_apertureJon Mason
free_bootmem_node expects a physical address to be passed in, but __alloc_bootmem_node returns a virtual one. That address needs to be translated to physical. Signed-off-by: Jon Mason <jdmason@us.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: timer interrupt lockup due to pending interruptVivek Goyal
o check_timer() routine fails while second kernel is booting after a crash on an opetron box. Problem happens because timer vector (0x31) seems to be locked. o After a system crash, it is not safe to service interrupts any more, hence interrupts are disabled. This leads to pending interrupts at LAPIC. LAPIC sends these interrupts to the CPU during early boot of second kernel. Other pending interrupts are discarded saying unexpected trap but timer interrupt is serviced and CPU does not issue an LAPIC EOI because it think this interrupt came from i8259 and sends ack to 8259. This leads to vector 0x31 locking as LAPIC does not clear respective ISR and keeps on waiting for EOI. o This patch issues extra EOI for the pending interrupts who have ISR set. o Though today only timer seems to be the special case because in early boot it thinks interrupts are coming from i8259 and uses mask_and_ack_8259A() as ack handler and does not issue LAPIC EOI. But probably doing it in generic manner for all vectors makes sense. Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Use cpumask bitops for cpu_vm_maskBrian Gerst
cpu_vm_mask is of type cpumask_t, so use the proper bitops. Signed-off-by: Brian Gerst <bgerst@didntduck.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Try to allocate node memmap near the end of nodeAndi Kleen
This fixes problems with very large nodes (over 128GB) filling up all of the first 4GB with their mem_map and not leaving enough space for the swiotlb. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Change default setting for noexec32 to match i386 kernelAndi Kleen
This means i386 processes compiled with a recent compiler will get non executable heap by default now. This is the same default as a 32bit PAE kernel would use on a NX enabled CPU. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Limit max number of CPUs to 255Andi Kleen
Because 256 causes overflows in some code that stores them in 8 bit fields and the x86 APIC architecture cannot handle more than 255 anyways. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: fix orphaned bits of timer init messagesChuck Ebbert
When x86_64 timer init messages were changed to use apic verbosity levels, two messages were missed and one got the wrong level. This causes the last word of a suppressed message to print on a line by itself. Fix that so either the entire message prints or none of it does. Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Basic reorder infrastructureArjan van de Ven
This patch puts the infrastructure in place to allow for a reordering of functions based inside the vmlinux. The general idea is that it is possible to put all "common" functions into the first 2Mb of the code, so that they are covered by one TLB entry. This as opposed to the current situation where a typical vmlinux covers about 3.5Mb (on x86-64) and thus 2 TLB entries. This is done by enabling the -ffunction-sections flag in gcc, which puts each function in its own ELF section, so that the linker can then order them in a way defined by the linker script. As per previous discussions, Linus said he wanted a "static" list for this, eg a list provided by the kernel tarbal, so that most people have the same ordering at least. A script is provided to create this list based on readprofile(1) output. The included list is provisional, and entirely biased on my own testbox and me running a few kernel compiles and some other things. I think that to get to a better list we need to invite people to submit their own profiles, and somehow add those all up and base the final list on that. I'm willing to do that effort if this is ends up being the prefered approach. Such an effort probably needs to be repeated like once a year or so to adopt to the changing nature of the kernel. Made it a CONFIG with default n because it increases link times dramatically. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Always use IO-APIC routing for timer.Andi Kleen
I tested it on a couple of chipsets and it worked everywhere so it should be ok as default for now. So far I haven't done the great purge of the useless old check_timer code yet though. Can be overwritten with enable_8254_timer in the worst case Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Don't invoke OOM killer during dma_alloc_coherent()Andi Kleen
There is a fallback logic, so it's better to not use the OOM killer in the allocations. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Reename CMOS update warningAndi Kleen
Was disabled due to an old bug, long gone. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Fix formatting in time.cAndi Kleen
Only white space changes, code should be identical Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Handle years beyond 2100Andi Kleen
ACPIv2 has an official but optional way to get a date >2100. Use it. But all the platforms I tested didn't seem to support it. But anyways the x86-64 kernel should be ready for the 22nd century now. Actually i shouldn't care about this because I will be dead by then @) Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Patch to make the head.S-must-be-first-in-vmlinux order explicitArjan van de Ven
This patch puts the code from head.S in a special .bootstrap.text section. I'm working on a patch to reorder the functions in the kernel (I'll post that later), but for x86-64 at least the kernel bootstrap requires that the head.S functions are on the very first page/pages of the kernel text. This is understandable since the bootstrap is complex enough already and not a problem at all, it just means they aren't allowed to be reordered. This patch puts these special functions into a separate section to document this, and to guarantee this in the light of possibly reordering the rest later. (So this patch doesn't fix a bug per se, but makes things more robust by making the order of these functions explicit) Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Add __init to fixmap functions that are only called during bootAndi Kleen
Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Implement early DMI scanningAndi Kleen
There are more and more cases where we need to know DMI information early to work around bugs. i386 already had early DMI scanning, but x86-64 didn't. Implement this now. This required some cleanup in the i386 code. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: s/Overwrite/Override/ in arch/x86-64Dave Jones
s/Overwrite/Override/ Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Move kernel to 2MBAndi Kleen
As suggested by Andi (and Alan), move the default kernel location from 1Mb to 2Mb, to align to the start of a TLB entry. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: prefetch the mmap_sem in the fault pathArjan van de Ven
In a micro-benchmark that stresses the pagefault path, the down_read_trylock on the mmap_sem showed up quite high on the profile. Turns out this lock is bouncing between cpus quite a bit and thus is cache-cold a lot. This patch prefetches the lock (for write) as early as possible (and before some other somewhat expensive operations). With this patch, the down_read_trylock basically fell out of the top of profile. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: to use lapic ids instead of initial apic idsRavikiran G Thirumalai
phys_proc_id[] on AMD boxes is right now populated with the initial apic id, obtained by the cpuid instruction. But, the initial apic id need not be the local apic id on clustered APIC systems (see comment at x86_64/kernel/genapic_cluster.c, line 110). On vSMPowered with AMD CPUs the cpu_to_node will turn out to be incorrect (as apicid_to_node[] is indexed by the initial apic id rather than the local apic id). On vSMPowered boxes with Intel CPUs this is working correctly as phys_proc_id[] is initialized correctly in detect_ht(). This fixes AMD boot path according to specification, to use the correct routines for local apic id and socket ids. We use hard_smp_processor_id() to read the local apic id, and phys_pkg_id() to determine socket id for phys_proc_id[] Patch tested on Tyan multicore boxes as well as vSMPowered boxes. Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org> Signed-off-by: Shai Fultheim <shai@scalex86.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: miscellaneous cleanupJan Beulich
- adjust limits of GDT/IDT pseudo-descriptors (some were off by one) - move empty_zero_page into .bss.page_aligned - move cpu_gdt_table into .data.page_aligned - move idt_table into .bss - align inital_code and init_rsp - eliminate pointless (re-)declaration of idt_table in traps.c Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Make pfn_valid work early in bootAndi Kleen
It needs num_physpages, so initialize it early. It's later overwritten again. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Clean up white space in traps.cRoberto Nibali
Attached is a small code style cleanup patch that resulted from my skimming through the arch/x86_64/kernel/traps.c code to figure out what went haywire. Signed-off-by: Roberto Nibali <ratz@drugphish.ch> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Check that early arguments are words on their ownAndi Kleen
We've always had the problem that arguments only did a prefix match, which resulted e.g. in noapic and noapictimer getting confused. Fix the early argument parsing code to always check that arguments are whole words (except for those that take additional arguments of course) I factored out the checking code for that while also makes the code easier to maintain. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: remove dead do_softirq_thunkJan Beulich
Appearantly a left-over... Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: actively synchronize vmalloc area when registering certain ↵Jan Beulich
callbacks While the modular aspect of the respective i386 patch doesn't apply to x86-64 (as the top level page directory entry is shared between modules and the base kernel), handlers registered with register_die_notifier() are still under similar constraints for touching ioremap()ed or vmalloc()ed memory. The likelihood of this problem becoming visible is of course significantly lower, as the assigned virtual addresses would have to cross a 2**39 byte boundary. This is because the callback gets invoked (a) in the page fault path before the top level page table propagation gets carried out (hence a fault to propagate the top level page table entry/entries mapping to module's code/data would nest infinitly) and (b) in the NMI path, where nested faults must absolutely not happen, since otherwise the IRET from the nested fault re-enables NMIs, potentially resulting in nested NMI occurences. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Use cpu_relax in poll loop in GART IOMMUAndi Kleen
The code waits for the GART to clear the TLB flush bit. Use cpu_relax in this time to allow hypervisors to yield the CPU in this time. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Report local APIC ID when initializing CPUAndi Kleen
Makes some debugging easier. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Don't need to read PIT in timer handler when PM timer is usedAndi Kleen
The PM timer path through main_timer_handler doesn't need the delay variable because it figures it out in a different way. Don't try to read it from the PIT. With stopped PIT timer it is even useless. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: cleanup allocating logical cpu numbers in x86_64Ashok Raj
Minor cleanup to lend better for physical CPU hotplug. Earlier way of using num_processors as index doesnt fit if CPUs come and go. This makes the code little bit better to read, and helps physical hotplug use the same functions as boot. Reserving CPU0 for BSP is too late to be done in smp_prepare_boot_cpu(). Since logical assignments from MADT is already done via setup_arch()->acpi_boot_init()->parse lapic Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: save FPU context slightly laterJan Beulich
Touching of the floating point state in a kernel debugger must be NMI-safe, specifically math_state_restore() must be able to deal with being called out of an NMI context. In order to do that reliably, the context switch code must take care to not leave a window open where the current task's TS_USEDFPU flag and CR0.TS could get out of sync. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: eliminate set_debug()Jan Beulich
For consistency and to have only a single place of definition, replace set_debug() uses with set_debugreg(), and eliminate the definition of thj former. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: disallow multi-byte hardware execution breakpointsJan Beulich
While AMD formally permits multi-byte execution breakpoints, Intel disallows 8-byte as much as 2- or 4-byte ones. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: cpu_pda array to macro followup correctionJan Beulich
Fix one place where the previous change of cpu_pda from being an array to being a macro was not properly carried out. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Rename struct node in x86-64 NUMA code to struct bootnodeAndi Kleen
It conflicts with the struct node in node.h Actually the x86-64 version was there first, but .. Suggested by Jan Beulich Cc: jbeulich@novell.com Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86-64: Use -mtune=generic for generic kernelsAndi Kleen
The upcomming gcc 4.2 got a new option -mtune=generic to tune code for both common AMD and Intel CPUs. Use this option when available for generic kernels. On x86-64 it is used with CONFIG_GENERIC_CPU. On i386 it is enabled with CONFIG_X86_GENERIC. It won't affect the base line CPU support in any ways and also not the minimum supported CPU. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Use correct PUD for memory hotaddJan Beulich
Memory >39bits has a different PUD. Cc: "Tolentino, Matthew E" <matthew.e.tolentino@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25[PATCH] x86_64: Update defconfigAndi Kleen
Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25Merge master.kernel.org:/pub/scm/linux/kernel/git/sam/kbuildLinus Torvalds
* master.kernel.org:/pub/scm/linux/kernel/git/sam/kbuild: (46 commits) kbuild: remove obsoleted scripts/reference_* files kbuild: fix make help & make *pkg kconfig: fix time ordering of writes to .kconfig.d and include/linux/autoconf.h Kconfig: remove the CONFIG_CC_ALIGN_* options kbuild: add -fverbose-asm to i386 Makefile kbuild: clean-up genksyms kbuild: Lindent genksyms.c kbuild: fix genksyms build error kbuild: in makefile.txt note that Makefile is preferred name for kbuild files kbuild: replace PHONY with FORCE kbuild: Fix bug in crc symbol generating of kernel and modules kbuild: change kbuild to not rely on incorrect GNU make behavior kbuild: when warning symbols exported twice now tell user this is the problem kbuild: fix make dir/file.xx when asm symlink is missing kbuild: in the section mismatch check try harder to find symbols kbuild: fix section mismatch check for unwind on IA64 kbuild: kill false positives from section mismatch warnings for powerpc kbuild: kill trailing whitespace in modpost & friends kbuild: small update of allnoconfig description kbuild: make namespace.pl CROSS_COMPILE happy ... Trivial conflict in arch/ppc/boot/Makefile manually fixed up
2006-03-25[PATCH] sys_alarm() unsigned signed conversion fixupThomas Gleixner
alarm() calls the kernel with an unsigend int timeout in seconds. The value is stored in the tv_sec field of a struct timeval to setup the itimer. The tv_sec field of struct timeval is of type long, which causes the tv_sec value to be negative on 32 bit machines if seconds > INT_MAX. Before the hrtimer merge (pre 2.6.16) such a negative value was converted to the maximum jiffies timeout by the timeval_to_jiffies conversion. It's not clear whether this was intended or just happened to be done by the timeval_to_jiffies code. hrtimers expect a timeval in canonical form and treat a negative timeout as already expired. This breaks the legitimate usage of alarm() with a timeout value > INT_MAX seconds. For 32 bit machines it is therefor necessary to limit the internal seconds value to avoid API breakage. Instead of doing this in all implementations of sys_alarm the duplicated sys_alarm code is moved into a common function in itimer.c Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-24[PATCH] early_printk: cleanup trailiing whitespaceRandy Dunlap
Remove all trailing tabs and spaces. No other changes. Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>