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This patch fixes a numbers of issues regarding to that both 8xx and 82xx
began to use ppc_sys model:
- Platform is now identified by default deviceless SOC, if no
BOARD_CHIP_NAME is specified in the bard-specific header. For the list
of supported names refer to (arch/ppc/syslib/) mpc8xx_sys.c and
mpc82xx_sys.c for 8xx and 82xx respectively.
- Fixed a bug in identification by name - if the name was not found,
it returned -1 instead of default deviceless ppc_spec.
- fixed devices amount in the 8xx platform system descriptions
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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This patch updates the 85xx platform code to support the new PHY Layer.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <Kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Add proper entry to support the Marvell MV64361 (Marvell Discovery II)
SRAM.
This feature may be used by the mv643xx_eth driver.
Signed-off-by: Nicolas DET <det.nicolas@free.fr>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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This implements a nvram acccess method, similar to
arch/ppc64/kernel/pSeries_nvram.c tested on CHRP B50.
Signed-off-by: Olaf Hering <olh@suse.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Change the phys_mem_access_prot() function to take a pfn instead of an
address. This allows mmap64() to work on /dev/mem for addresses above 4G
on 32-bit architectures. We start with a pfn in mmap_mem(), so there's no
need to convert to an address; in fact, it's actively bad, since the
conversion can overflow when the address is above 4G.
Similarly fix the ppc32 page_is_ram() function to avoid a conversion to an
address by directly comparing to max_pfn. Working with max_pfn instead of
high_memory fixes page_is_ram() to give the right answer for highmem pages.
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Cc: Anton Blanchard <anton@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Mention a few more commands in xmon. System.map processing was replaced
with kallsyms.
Signed-off-by: Olaf Hering <olh@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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#ifdef out an ALTIVEC specific tweak in __switch_to()
Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Cleanup PPC440 eval boards (bamboo, ebony, luan and ocotea) to better
support U-Boot as bootloader.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Convert core 8xx drivers to use in_xxxbe/in_xxx macros instead of direct
memory references.
Other than making IO accesses explicit (which is a plus for readability), a
common set of macros provides a unified place for the volatile flag to
constraint compiler code reordering.
There are several unlucky places at the moment which lack the volatile
flag.
Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Depending on how GCC is built, GCC 4 may generate altivec instructions without
user explicitly requesting vector operations in the code. Although this is a
performance booster for user applications, it is a problem for kernel.
This patch explicitly instruct GCC to NOT generate altivec instructions while
building the kernel.
Here are some test cases I ran.
(1) build gcc 4.0.1 with '--with-cpu=7450 --enable-altivec
--enable-cxx-flags=-mcpu=7450', and use this gcc to build kernel WITHOUT
this kernel patch. Kernel fail to boot up on a 7450 board because of
altivec instructions in kernel.
(2) build gcc 4.0.1 with "--with-cpu=7450 --enable-altivec
--enable-cxx-flags=-mcpu=7450", and use this gcc to build kernel WITH this
kernel patch. Kernel boot up on a 7450 board without any problem.
(3) build gcc 4.0.1 with "--with-cpu=750 --enable-cxx-flags=-mcpu=750",
and use this gcc to build kernel with or without this kernel patch.
Kernel boot up on a 7450 board without any problem.
This patch should also work with GCC 3 or even earlier GCC 2.95.3.
Signed-off-by: Lee Nicks <allinux@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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The merged version follows the ppc64 version pretty closely mostly,
and in fact ARCH=ppc64 now uses the arch/powerpc/xmon version.
The main difference for ppc64 is that the 'p' command to call
show_state (which was always pretty dodgy) has been replaced by
the ppc32 'p' command, which calls a given procedure (so in fact
the old 'p' command behaviour can be achieved with 'p $show_state').
Signed-off-by: Paul Mackerras <paulus@samba.org>
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The sc instruction emulation can't be done the same way on 32-bit
as 64-bit yet, but this should work OK.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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... for consistency with 64-bit.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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This patch moves the XICS interrupt controller code into the
platforms/pseries directory, since it only appears on pSeries
machines. If it ever appears on some other machine we can move it to
sysdev, although xics.c itself will need a bunch of changes in that
case to remove pSeries specific assumptions.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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and remove the same bits from ppc64/lib/string.S.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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since it is identical to usercopy.c from ppc64/lib.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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since it is identical to strcase.c from ppc64/lib.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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since it is identical to sstep.c from ppc64/lib.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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since it is identical to mempcy.S from ppc64/lib.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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since it is effectively the same as locks.c from ppc64/lib.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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since it is identical to copyuser.S from ppc64/lib.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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since it is identical to copypage.S from ppc64/lib.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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since it is identical to e2a.c from ppc64/lib
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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as it is identical to checksum.S from ppc64.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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This allows us to also use entry_64.S from the merged tree and reverts
the setup_64.c part of fda262b8978d0089758ef9444508434c74113a61.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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We still had an old copy of i8259.h lying around; this gets rid of it
and corrects the callers of i8259_init and i8259_irq.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Since I sent the patch to purge bootinfo.h from ARCH=powerpc and
ARCH=ppc64, setup-common.c has come into existence, and another
#include of bootinfo.h slipped in. This patch removes it. It also
removes include/asm-ppc64/bootinfo.h, which somehow survived the
previous patch which was supposed to remove it.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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For the current time idle_6xx only applies to 6xx ppc32 CPUs
Signed-off-by: Kumar K. Gala <kumar.gala@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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... which is needed now that ARCH=ppc64 is using the merged
setup_64.c.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Signed-off-by: Paul Mackerras <paulus@samba.org>
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My G5 was being reported as an OldWorld in /proc/cpuinfo, which is
obviously not right... :)
Signed-off-by: Paul Mackerras <paulus@samba.org>
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On 32-bit platforms, these convert from kernel virtual addresses
to real (physical addresses), like tophys/tovirt but they use
the same register for the source and destination. On 64-bit
platforms, they do nothing because the hardware ignores the top
two bits of the address in real mode.
These new macros are used in fpu.S now.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Untested, but "should" work... at least this way it compiles.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Signed-off-by: Paul Mackerras <paulus@samba.org>
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Signed-off-by: Kumar K. Gala <kumar.gala@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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do_dabr() is not relevant on 40x or Book-E processors so dont build it
Signed-off-by: Kumar K. Gala <kumar.gala@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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With ARCH=powerpc we assume the presence of a device tree, so we don't
require any support for the old bi_recs method of passing boot
parameters. Likewise, we've never needed it for ppc64, but we still
had an include/asm-ppc64/bootinfo.h from which nothing was used. This
patch removes that file, and all references to it in arch/ppc64 and
arch/powerpc. A related, unused variable 'boot_mem_size' is also
removed from setup_32.c. The bootinfo stuff remains in ARCH=ppc for
the time being.
Built and booted on Power5 (ARCH=ppc64 and ARCH=powerpc), built for
32-bit powermac (ARCH=powerpc and ARCH=ppc).
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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The recent merge of fpu.S broken the handling of fpscr for
ARCH=powerpc and CONFIG_PPC64=y. FP registers could be corrupted,
leading to strange random application crashes.
The confusion arises, because the thread_struct has (and requires) a
64-bit area to save the fpscr, because we use load/store double
instructions to get it in to/out of the FPU. However, only the low
32-bits are actually used, so we want to treat it as a 32-bit quantity
when manipulating its bits to avoid extra load/stores on 32-bit. This
patch replaces the current definition with a structure of two 32-bit
quantities (pad and val), to clarify things as much as is possible.
The 'val' field is used when manipulating bits, the structure itself
is used when obtaining the address for loading/unloading the value
from the FPU.
While we're at it, consolidate the 4 (!) almost identical versions of
cvt_fd() and cvt_df() (arch/ppc/kernel/misc.S,
arch/ppc64/kernel/misc.S, arch/powerpc/kernel/misc_32.S,
arch/powerpc/kernel/misc_64.S) into a single version in fpu.S. The
new version takes a pointer to thread_struct and applies the correct
offset itself, rather than a pointer to the fpscr field itself, again
to avoid confusion as to which is the correct field to use.
Finally, this patch makes ARCH=ppc64 also use the consolidated fpu.S
code, which it previously did not.
Built for G5 (ARCH=ppc64 and ARCH=powerpc), 32-bit powermac (ARCH=ppc
and ARCH=powerpc) and Walnut (ARCH=ppc, CONFIG_MATH_EMULATION=y).
Booted on G5 (ARCH=powerpc) and things which previously fell over no
longer do.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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and use setup_64.c from the merged tree instead. The only difference
between them was the code to set up the syscall maps.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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This should have been in commit 03501dab035ab7da5e1373f5e130cfd6346d3f21
but got missed by accident.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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The mpic interrupt controller driver (used on G5 and early pSeries among
others) has a bug where it doesn't get the right virtual address for the
timer registers. It causes the driver to poke at the MMIO space of
whatever has been mapped just next to it (ouch !) when initializing and
causes boot failures on some IBM machines.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Signed-off-by: Paul Mackerras <paulus@samba.org>
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We were computing the wrong address for the MPIC timer registers,
so when we went to initialize them we would have been hitting some
unrelated ioremap... oops.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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This trims off the extra unusable memory from the lmb structure,
so we don't try to use it.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Talk about buggy firmware... the OF on the Longtrail returns 0
from the claim client service rather than -1 when the claim fails.
It also has no device_type on the /memory node and blows up if
the output buffer for package-to-path is too big.
This also fixes a bug with calling alloc_up with align == 0, where
we did _ALIGN_UP(alloc_bottom, 0) which will end up as 0.
Lastly, we now check the return value (in r3) from calling the
prom, and return -1 from call_prom if we get a negative value back.
That is supposed to indicate that the requested client service
doesn't exist.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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SMP still needs more work but UP gets as far as starting userspace
at least. This uses the 64-bit-style code for spinning up the cpus.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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If the machine's clock is set to a bogus value, this check resulted
in userland waiting effectively forever for the RTC value to change,
so remove the check.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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