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2005-12-16[IA64] disable preemption in udelay()John Hawkes
The udelay() inline for ia64 uses the ITC. If CONFIG_PREEMPT is enabled and the platform has unsynchronized ITCs and the calling task migrates to another CPU while doing the udelay loop, then the effective delay may be too short or very, very long. This patch disables preemption around 100 usec chunks of the overall desired udelay time. This minimizes preemption-holdoffs. udelay() is now too big to be inline, move it out of line and export it. Signed-off-by: John Hawkes <hawkes@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-12-15[PATCH] arch/powerpc/kernel/syscalls.c __user annotationsAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-15[PATCH] arch/alpha/kernel/machvec_impl.h: C99 struct initializerAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-15[PATCH] ia64 sn __iomem annotationsAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-15[PATCH] i386,amd64: ioremap.c __iomem annotationsAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-15[PATCH] i386,amd64: mmconfig __iomem annotationsAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-15[PATCH] arch/sparc/kernel/led.c __user annotationsAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-15[PATCH] sun4c_memerr_reg __iomem annotationsAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-15[PATCH] sparc: NULL noise removal (ebus.c)Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-15[PATCH] sparc/kernel/time: __iomem annotationsAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-15[PATCH] fix iomem annotations in sparc32 pcic codeAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-14Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
2005-12-14[ARM] 3205/1: Handle new EABI relocations when loading kernel modules.Daniel Jacobowitz
Patch from Daniel Jacobowitz Handle new EABI relocations when loading kernel modules. This is necessary for CONFIG_AEABI kernels, and also for some broken (since fixed) old ABI toolchains. Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-12-14[IA64] fix for SET_PERSONALITY when CONFIG_IA32_SUPPORT is not set.Robin Holt
Missed this when fixing the SET_PERSONALITY change. Signed-off-by: Robin Holt <holt@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-12-12[PATCH] x86_64: Bug correction in populate_memnodemap()Eric Dumazet
As reported by Keith Mannthey, there are problems in populate_memnodemap() The bug was that the compute_hash_shift() was returning 31, with incorrect initialization of memnodemap[] To correct the bug, we must use (1UL << shift) instead of (1 << shift) to avoid an integer overflow, and we must check that shift < 64 to avoid an infinite loop. Signed-off-by: Eric Dumazet <dada1@cosmosbay.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12[PATCH] x86_64: Fix collision between pmtimer and pit/hpetjohn stultz
On systems that do not support the HPET legacy functions (basically the IBM x460, but there could be others), in time_init() we accidentally fall into a PM timer conditional and set the vxtime_hz value to the PM timer's frequency. We then use this value with the HPET for timekeeping. This patch (which mimics the behavior in time_init_gtod) corrects the collision. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12[PATCH] x86_64: Fix 32bit thread coredumpsAndi Kleen
When a register set is passed in don't try to fix up the pointer. Noticed by Al Viro Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12[PATCH] i386/x86-64 Correct for broken MCFG tables on K8 systemsAndi Kleen
They report all busses as MMCONFIG capable, but it never works for the internal devices in the CPU's builtin northbridge. It just probes all func 0 devices on bus 0 (the internal northbridge is currently always on bus 0) and if they are not accessible using MCFG they are put into a special fallback bitmap. On systems where it isn't we assume the BIOS vendor supplied correct MCFG. Requires the earlier patch for mmconfig type1 fallback Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12[PATCH] i386/x86-64 Fall back to type 1 access when no entry foundAndi Kleen
When there is no entry for a bus in MCFG fall back to type1. This is especially important on K8 systems where always some devices can't be accessed using mmconfig (in particular the builtin northbridge doesn't support it for its own devices) Cc: <gregkh@suse.de> Cc: <jgarzik@pobox.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12[PATCH] i386/x86-64: Don't call change_page_attr with a spinlock heldAndi Kleen
It's illegal because it can sleep. Use a two step lookup scheme instead. First look up the vm_struct, then change the direct mapping, then finally unmap it. That's ok because nobody can change the particular virtual address range as long as the vm_struct is still in the global list. Also added some LinuxDoc documentation to iounmap. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12[PATCH] i386/x86-64 disable LAPIC completely for offline CPUShaohua Li
Disabling LAPIC timer isn't sufficient. In some situations, such as we enabled NMI watchdog, there is still unexpected interrupt (such as NMI) invoked in offline CPU. This also avoids offline CPU receives spurious interrupt and anything similar. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: "Seth, Rohit" <rohit.seth@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12[PATCH] x86_64: Make sure hpet_address is 0 when any part of HPET ↵Andi Kleen
initialization fails Otherwise TSC->HPET fallback could see incorrect state and crash later. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12Merge branch 'release' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
2005-12-12Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds
2005-12-12Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
2005-12-12[SPARC]: block/ needed in final image linkPaul Jackson
With this fix, sparc links vmlinuz again using crosstool. Without this fix, the final link fails missing several dozen dozen symbols, beginning with: kernel/built-in.o(.text+0x6fd0): In function `do_exit': : undefined reference to `exit_io_context' (exit_io_context is defined in block/ll_rw_blk.c). Signed-off-by: Paul Jackson <pj@sgi.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2005-12-12[SPARC]: atomic_clear_mask build fixPaul Jackson
This fixes one build error introduced in sparc with the patch of Oct 30, resent Nov 4 "[patch 3/5] atomic: atomic_inc_not_zero" I still can't get sparc to build, but at least it gets further after I remove this line. Apparently, this change was agreed to by Andrew and Nick on Nov 14, but everyone thought someone else was doing it. Signed-off-by: Paul Jackson <pj@sgi.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2005-12-12[PATCH] Fix Kconfig of DMA32 for ia64Yasunori Goto
I realized ZONE_DMA32 has a trivial bug at Kconfig for ia64. In include/linux/gfp.h on 2.6.15-rc5-mm1, CONFIG is define like followings. #ifdef CONFIG_DMA_IS_DMA32 #define __GFP_DMA32 ((__force gfp_t)0x01) /* ZONE_DMA is ZONE_DMA32 */ : : So, CONFIG_"ZONE"_DMA_IS_DMA32 is clearly wrong. Signed-off-by: Yasunori Goto <y-goto@jp.fujitsu.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12[PATCH] kprobes: increment kprobe missed count for multiprobesKeshavamurthy Anil S
When multiple probes are registered at the same address and if due to some recursion (probe getting triggered within a probe handler), we skip calling pre_handlers and just increment nmissed field. The below patch make sure it walks the list for multiple probes case. Without the below patch we get incorrect results of nmissed count for multiple probe case. Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12[PATCH] mips: setup_zero_pages count 1Hugh Dickins
Page count should be initialized to 1 on each of the MIPS empty zero pages, to avoid a bad_page warning whenever one of them is freed from all mappings. Signed-off-by: Hugh Dickins <hugh@veritas.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12[PATCH] uml: fix compile error for ttPekka J Enberg
arch/um/kernel/tt/uaccess.c: In function `copy_from_user_tt': arch/um/kernel/tt/uaccess.c:11: error: `FIXADDR_USER_START' undeclared (first use in this function) arch/um/kernel/tt/uaccess.c:11: error: (Each undeclared identifier is reported only once arch/um/kernel/tt/uaccess.c:11: error: for each function it appears in.) I get the compile error when I disable CONFIG_MODE_SKAS. Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Acked-by: Paolo Giarrusso <blaisorblade@yahoo.it> Cc: Jeff Dike <jdike@addtoit.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12[PATCH] x86: fix NMI with CPU hotplugShaohua Li
With CPU hotplug enabled, NMI watchdog stoped working. It appears the violation is the cpu_online check in nmi handler. local ACPI based NMI watchdog is initialized before we set CPU online for APs. It's quite possible a NMI is fired before we set CPU online, and that's what happens here. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Acked-by: Zwane Mwaikambo <zwane@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12[ARM] 3201/1: PXA27x: Prevent hangup during resume due to inadvertedly ↵Lothar Wassmann
enabling MBREQ (replaces: 3198/1) Patch from Lothar Wassmann The patch makes sure, that the ouptut functions of pins are restored before restoring the Alternat Function settings, preventing pins from being intermediately configured for undefined or unwanted alternate functions. Here is the original comment: I've got a PXA270 system that uses GPIO80 as nCS4. This system did hang on resume. Digging into the problem I found that the processor stalled immediately when restoring the GAFR2_U register which restored the alternate function for GPIO80. Since the GPDR registers were restored after the GAFR registers, the offending GPIO was configured as input at this point. Thus the alternate function that was in effect after restoring the GAFR was in fact the input function "MBREQ" instead of the output function "nCS4". The "PXA27x Processor Family Developer's Manual" (Footnote in Table 6-1 on page 6-3) states that: "The MBREQ alternate function must not be enabled until the PSSR[RDH] bit field is cleared. For more details, see Table 3-15, "PSSR Bit Definitions" on page 3-71." There is another note in the Developer's Manual (chapter 24.4.2 "GPIO operation as Alternate Function" on page 24-4) stating that: "Configuring a GPIO for an alternate function that is not defined for it causes unpredictable results." Since some GPIOs have no input function defined, and to prevent inadvertedly programming the MBREQ function on some pin, the GAFR registers should be restored after the GPDR registers have been restored. Additional provisions have to be made when the MBREQ function is actually required. The corresponding GAFR bits should not be restored with the regular GAFR restore, but must be set only after the PSSR bits have been cleared. Signed-off-by: Lothar Wassmann <LW@KARO-electronics.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-12-12[PATCH] ppc32: set smp_tb_synchronized on UP with SMP kernelJohannes Berg
ppc32 kernel, when built with CONFIG_SMP and booted on a single CPU machine, will not properly set smp_tb_synchronized, thus causing gettimeofday() to not use the HW timebase and to be limited to jiffy resolution. This, among others, causes unacceptable pauses when launching X.org. Signed-Off-By: Johannes Berg <johannes@sipsolutions.net> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-12-12[PATCH] powerpc: Fix clock spreading setting on some powermacsBenjamin Herrenschmidt
The code that sets the clock spreading feature of the Intrepid ASIC must not be run on some machine models or those won't boot. This fixes it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-12-10[ARM] 3200/1: Singlestep over ARM BX and BLX instructions using ptrace fixNikola Valerjev
Patch from Nikola Valerjev Single stepping an application using ptrace() fails over ARM instructions BX and BLX. Steps to reproduce: Compile and link the following files main.c ----- void foo(); int main() { foo(); return 0; } foo.s ----- .text .globl foo foo: BX LR Using ptrace() functionality, run to main(), and start singlestepping. Singlestep over \"BX LR\" instruction won\'t transfer the control back to main, but run the code to completion. This problems seems to be in the function get_branch_address() in arch/arm/kernel/ptrace.c. The function doesn\'t seem to recognize BX and BLX instructions as branches. BX and BLX instructions can be used to convert from ARM to Thumb mode if the target address has the low bit set. However, they are also perfectly legal in the ARM only mode. Although other things in the kernel seem to indicate that only ARM mode is accepted (and not Thumb), many compilers will generate BX and BLX instructions even when generating ARM only code. Signed-off-by: Nikola Valerjev <nikola@ghs.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-12-09[PATCH] powerpc: Fix SLB flushing path in hugepageDavid Gibson
On ppc64, when opening a new hugepage region, we need to make sure any old normal-page SLBs for the area are flushed on all CPUs. There was a bug in this logic - after putting the new hugepage area masks into the thread structure, we copied it into the paca (read by the SLB miss handler) only on one CPU, not on all. This could cause incorrect SLB entries to be loaded when a multithreaded program was running simultaneously on several CPUs. This patch corrects the error, copying the context information into the PACA on all CPUs using the mm in question before flushing any existing SLB entries. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-12-09[PATCH] powerpc: Add missing icache flushes for hugepagesDavid Gibson
On most powerpc CPUs, the dcache and icache are not coherent so between writing and executing a page, the caches must be flushed. Userspace programs assume pages given to them by the kernel are icache clean, so we must do this flush between the kernel clearing a page and it being mapped into userspace for execute. We were not doing this for hugepages, this patch corrects the situation. We use the same lazy mechanism as we use for normal pages, delaying the flush until userspace actually attempts to execute from the page in question. Tested on G5. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-12-09[PATCH] powerpc: Set cache info defaultsOlof Johansson
Cache info is setup by walking the device tree in initialize_cache_info(). However, icache_flush_range might be called before that, in slb_initialize()->patch_slb_encoding, which modifies the load immediate instructions used with SLB fault code. Not only that, but depending on memory layout, we might take SLB faults during unflatten_device_tree. So that fault will load an SLB entry that might not contain the right LLP flags for the segment. Either we can walk the flattened device tree to setup cache info, or we can pick the known defaults that are known to work. Doing it in the flattened device tree is hairier since we need to know the machine type to know what property to look for, etc, etc. For now, it's just easier to go with the defaults. Worst thing that happens from it is that we might waste a few cycles doing too small dcbst/icbi increments. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-12-08[PATCH] powerpc: Remove debug code in hash pathBenjamin Herrenschmidt
Some debug code wasn't properly removed from the initial 64k pages patch, and while it's harmless, it's also slowing down significantly a very hot code path, thus it should really be removed. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-12-08[PATCH] powerpc: Fix a huge page bugBenjamin Herrenschmidt
The 64k pages patch changed the meaning of one argument passed to the low level hash functions (from "large" it became "psize" or page size index), but one of the call sites wasn't properly updated, causing potential random weird problems with huge pages. This fixes it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-12-08[PATCH] powerpc/pseries: boot failures on numa if no memory on nodeMike Kravetz
This bug exists in the current code and prevents machines from booting with numa enabled if there is a node that does not contain memory. Workaround is to boot with 'numa=off'. Looks like a simple typo. Signed-off-by: Mike Kravetz <kravetz@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-12-06[IA64-SGI] Fix SN PTC deadlock recoveryJack Steiner
The patch that added support for a new platform chipset (shub2) broke PTC deadlock recovery on older versions of the chipset. (PTCs are the SN platform-specific method for doing a global TLB purge). This patch fixes deadlock recovery so that it works on both the old & new chipsets. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-12-06[IA64] Change SET_PERSONALITY to comply with comment in binfmt_elf.c.Robin Holt
We have a customer application which trips a bug. The problem arises when a driver attempts to call do_munmap on an area which is mapped, but because current->thread.task_size has been set to 0xC0000000, the call to do_munmap fails thinking it is an unmap beyond the user's address space. The comment in fs/binfmt_elf.c in load_elf_library() before the call to SET_PERSONALITY() indicates that task_size must not be changed for the running application until flush_thread, but is for ia64 executing ia32 binaries. This patch moves the setting of task_size from SET_PERSONALITY() to flush_thread() as indicated. The customer application no longer is able to trip the bug. Signed-off-by: Robin Holt <holt@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-12-06[IA64] Limit the maximum NODEDATA_ALIGN() offsetJack Steiner
The per-node data structures are allocated with strided offsets that are a function of the node number. This prevents excessive cache-aliasing from occurring. On systems with a large number of nodes, the strided offset becomes too large. This patch restricts the maximum offset to 32MB. This is far larger than the size of any current L3 cache. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-12-06[IA64-SGI] altix: pci_window fixupJohn Keller
Altix only patch to add fixup code that sets up pci_controller->window. This code is a temporary fix until ACPI support on Altix is added. Also, corrects the usage of pci_dev->sysdata, which had previously been used to reference platform specific device info, to now point to a pci_controller struct. Signed-off-by: John Keller <jpk@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-12-05[IA64] Allow salinfo_decode to detect signals on readKeith Owens
Return -EINTR instead of -ERESTARTSYS when signals are delivered during a blocked read of /proc/sal/*/event. This allows salinfo_decode to detect signals when it is blocked on a read of those files. Signed-off-by: Keith Owens <kaos@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-12-05[PATCH] powerpc: remove redundant code in stab initOlof Johansson
There's never been a hardware platform that has both pSeries/RPA LPAR hypervisor and stab (pre-POWER4 segment management). This removes the redundant code in stab_initalize(). Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-12-05ppc: Build in all three of powermac, PREP and CHRP supportPaul Mackerras
This reverts commit da0825fd201a03294dbf7f8f030676d608da122c, making it so that if you select CONFIG_PPC_MULTIPLATFORM you get support for PMAC, PREP and CHRP built in. The reason for not allowing PMAC, PREP and CHRP to be selected individually for ARCH=ppc is that there is too much interdependency between them in the platform support code. For example, CHRP uses the PMAC nvram code. Configuring with ARCH=powerpc does allow you to select support for PMAC and CHRP separately. Support for PREP is not there yet but should be there soon. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-12-05powerpc/pseries: Optimize IOMMU setupPaul Mackerras
The previous commit will use the page-at-a-time hypervisor call for setting up IOMMU entries when we are using 64k pages and setting up one 64k page, even though that means 16 calls to the hypervisor, since the hypervisor still works on 4k pages. This optimizes this case by using the multi-page IOMMU setup hypervisor call instead. Signed-off-by: Paul Mackerras <paulus@samba.org>