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2007-10-11[MIPS] Use generic NTP code for all MIPS platformsRalf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Replace deprecated SA_* IRQ flags with modern IRQF_ variants.Ahmed S. Darwish
Signed-off-by: Ahmed S. Darwish <darwish.07@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] ARC: Get rid of mips_machgroupRalf Baechle
This has not been any serious user of this ill conceived thing since the original invention in like '95. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] ARC: Convert mach_table[] to ISO C initializers.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] dec/time.c: Remove no longer needed inclusion of <asm/div64.h>.Maciej W. Rozycki
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] GPIO LED driver for the WGT634U machineAurelien Jarno
Add LED support to the WGT634U machine. It uses the new gpio-led driver and a platform driver for the pin definitions. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Add gpio support to the BCM47XX platformAurelien Jarno
Add GPIO support to the BCM47XX platform. It will be used by a GPIO LED driver. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Add CFE support to BCM47XXAurelien Jarno
Add CFE support to the BCM47XX code. That includes querying CFE environment variables as well as using CFE to print messages before the serial port is initialized (early printk). Signed-off-by: Aurelien Jarno <aurel32@farad.aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Move ARC code into arch/mips/fw/arcAurelien Jarno
Move the ARC code to arch/mips/fw/arc from arch/mips/arc. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Move CFE code into arch/mips/fw/cfeAurelien Jarno
Move the platform independent part of the CFE code to arch/mips/fw/cfe from arch/mips/sibyte/cfe. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Remove IP27 specific structures from struct cpuinfo_mipsRalf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.Ralf Baechle
It may not be perfect yet but the SB1 code is badly borken and has horrible performance issues. Downside: This seriously breaks support for pass 1 parts of the BCM1250 where indexed cacheops don't work quite reliable but I seem to be the last one on the planet with a pass 1 part anyway. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Alchemy: remove useless prototypes.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Sibyte: cleanup static inline forward declarations.Ralf Baechle
In fact there are no foward declarations at all needed when moving things into the right order. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] R3000 setup for kernel_thread()Maciej W. Rozycki
Match the R4000 semantics for the initial state of interrupt/kernel status register flags for the R3000 in kernel_thread(). Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Introduce a consistent style for vmlinux.lds.Sam Ravnborg
This style will be consitent with all other arch's - soon. In addition: - Moved a few labels inside brackets for the sections they specify to prevent that linker alignmnet made them point before the section start Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Add GT641xx IRQ routines.Yoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] i8295 cleanups.Yoichi Yuasa
o Move i8259 function declarations to include/asm-mips/i8259.h o Make i8259.c functions static where possible. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Kill useless volatile keywordRalf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Kill redundant EXTRA_AFLAGSAtsushi Nemoto
Kill redundant EXTRA_AFLAGS added after the commit d2af363cfb94f1bacb3e60327bc44a97881a38c2. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] PCI: Always enable CONFIG_PCI_DOMAINSRalf Baechle
The cost is just too low. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] tx4927: Cleanup unused macros and non-standard IO accessors.Atsushi Nemoto
This patch removes many unused constants, replaces non-standard IO accessors with standard ones, and kills terrible tx4927_mips.h file. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] cleanup struct irqaction initializersThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> CC: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Add support for BCM47XX CPUs.Aurelien Jarno
Note that the BCM4710 does not support the wait instruction, this is not a mistake in the code. It originally comes from the OpenWrt patches. Cc: Michael Buesch <mb@bu3sch.de> Cc: Felix Fietkau <nbd@openwrt.org> Cc: Florian Schirmer <jolt@tuxbox.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] JAZZ fixesThomas Bogendoerfer
- restructured irq handling - switched vdma to use memory allocated via get_free_pages - setup platform devices for serial, jazz_esp and jazzsonic - fixed cmos rtc access Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Add back support for LASAT platformsBrian Murphy
Signed-off-by: Brian Murphy <brian@murphy.dk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] IP27: remove duplicate extern dump_tlb_all() prototypeYoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] VR41xx: replace infinite loop with hibernateYoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] VR41xx: Add default restart routine.Yoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Rename CONFIG_BUILD_ELF64 into KBUILD_64BIT_SYM32Franck Bui-Huu
This patch renames it for 3 reasons: - "CONFIG" pattern is used by Kconfig. Now this macro is no more defined by Kconfig but by Kbuild itself make this clear by translating "CONFIG" into "KBUILD". - "ELF32" word is improper because it is irrelevant to ELF format and it makes confusion with CONFIG_BOOT_ELF32. So translate it with SYM32. - Add "64BIT" part to make clear that this macro implies a 64 bits kernel. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Automatically set CONFIG_BUILD_ELF64Franck Bui-Huu
We do not rely on user anymore to setup this config correctly. Instead we make our choice depending on the load address. If we want to force Kbuild to use ELF64 format whatever the load address we can still do: $ make BUILD_ELF32=no Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Remove '-mno-explicit-relocs' option when CONFIG_BUILD_ELF64Franck Bui-Huu
This patch removes '-mno-explicit-relocs' usage when CONFIG_BUILD_ELF64 is set since this option was only required with the old hack to truncate addresses at the assembly level where "-mabi=64 -Wa,-mabi=32" was used. This should yield a small code size improvement for inline assembly, where the R constraint is used. The idea is coming from Maciej <macro@linux-mips.org>. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] SMTC: Microoptimize atomic_postincrement for non-weak consistency.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] vr41xx: add cpu_waitYoichi Yuasa
Add cpu_wait for NEC VR41xx Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] IRQ Affinity Support for SMTC on Malta PlatformKevin D. Kissell
Signed-off-by: Kevin D. Kissell <kevink@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-12Merge branch 'for-2.6.24' of git://git.secretlab.ca/git/linux-2.6-mpc52xx ↵Paul Mackerras
into for-2.6.24
2007-10-11backlight: Convert corgi backlight driver into a more generic driverRichard Purdie
Convert the corgi backlight driver to a more generic version so it can be reused by other code rather than being Zaurus/PXA specific. Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
2007-10-11[POWERPC] 4xx: Kilauea defconfig fileStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-11[POWERPC] 4xx: Kilauea DTSStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-11[POWERPC] 4xx: Add AMCC Kilauea eval board support to platforms/40xStefan Roese
This patch adds basic support for the new 405EX and the AMCC eval board Kilauea to arch/powerpc. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-11[POWERPC] 4xx: Add AMCC 405EX support to cputable.cStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-11[POWERPC] Adjust TASK_SIZE on ppc32 systems to 3GB that are capableKumar Gala
All ppc32 systems except PReP and 8xx are capable of handling 3G of user address space. Old legacy had set this to 2GB and no one has bothered to fix it. 8xx could be bumped up to 3GB if its SW TLB miss handlers were fixed up to properly determine kernel/user addresses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-11[POWERPC] Use PAGE_OFFSET to tell if an address is user/kernel in SW TLB ↵Kumar Gala
handlers Move to using PAGE_OFFSET instead of TASK_SIZE or KERNELBASE value on 6xx/40x/44x/fsl-booke to determine if the faulting address is a kernel or user space address. This mimics how the macro is_kernel_addr() works. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-11[POWERPC] 85xx: Enable FP emulation in MPC8560 ADS defconfigKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-11[POWERPC] 85xx: Killed <asm/mpc85xx.h>Kumar Gala
asm-powerpc/mpc85xx.h was really a hold over from arch/ppc. Now that more decoupling has occurred we can remove <asm/mpc85xx.h> and some of its legacy. As part of this we moved the definition of CPM_MAP_ADDR into cpm2.h for 85xx platforms. This is a stop gap until drivers stop using CPM_MAP_ADDR. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-11[POWERPC] 85xx: Add cpm nodes for 8541/8555 CDSScott Wood
We don't use any CPM devices on these boards, but the muram node on these chips is different from the 8560, so it's helpful to people working with custom boards based on these chips. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-11[POWERPC] 85xx: Convert mpc8560ads to the new CPM binding.Scott Wood
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-11[POWERPC] mpc8272ads: Remove muram from the CPM reg property.Scott Wood
This is described by the muram node now. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-11Merge branch 'virtex-for-2.6.24' of ↵Josh Boyer
git://git.secretlab.ca/git/linux-2.6-virtex into for-2.6.24-4xx
2007-10-11[POWERPC] Make clockevents work on PPC601 processorsPaul Mackerras
In testing the new clocksource and clockevent code on a PPC601 processor, I discovered that the clockevent multiplier value for the decrementer clockevent was overflowing. Because the RTCL register in the 601 effectively counts at 1GHz (it doesn't actually, but it increases by 128 every 128ns), and the shift value was 32, that meant the multiplier value had to be 2^32, which won't fit in an unsigned long on 32-bit. The same problem would arise on any platform where the timebase frequency was 1GHz or more (not that we actually have any such machines today). This fixes it by reducing the shift value to 16. Doing the calculations with a resolution of 2^-16 nanoseconds (15 femtoseconds) should be quite adequate. :) Signed-off-by: Paul Mackerras <paulus@samba.org>
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