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2009-12-04Merge branch 'pending-misc' (early part) into develRussell King
2009-12-04ARM: I-cache: flush executable mappings in flush_cache_range()Russell King
Dirk Behme reported instability on ARM11 SMP (VIPT non-aliasing cache) caused by the dynamic linker changing protection on text pages to write GOT entries. The problem is due to an interaction between the write faulting code providing new anonymous pages which are incoherent with the I-cache due to write buffering, and the I-cache not having been invalidated. a4db94d plugs the hole with the data cache coherency. This patch provides the other half of the fix by flushing the I-cache in flush_cache_range() for VM_EXEC VMAs (which is what we have when the region is being made executable again.) This ensures that the I-cache will be up to date with the newly COW'd pages. Note: if users are writing instructions, then they still need to use the ARM sys_cacheflush API to ensure that the caches are correctly synchronized. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-04ARM: I-cache: avoid flushing in flush_cache_mm()Russell King
flush_cache_mm() is called in two cases: 1. when a process exits, just before the page tables are torn down. We can allow the stale lines to evict themselves over time without causing any harm. 2. when a process forks, and we've allocated a new ASID. The instruction cache issues are dealt with as pages are brought into the new process address space. Flushing the I-cache here is therefore unnecessary. However, we must keep the VIPT aliasing D-cache flush to ensure that any dirty cache lines are not written back after the pages have been reallocated for some other use - which would result in corruption. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-04ARM: I-cache: Add invalidation for VIVT ASID tagged cachesRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-04ARM: 5794/1: Flush the D-cache during copy_user_highpage()Catalin Marinas
The I and D caches for copy-on-write pages on processors with write-allocate caches become incoherent causing problems on application relying on CoW for text pages (dynamic linker relocating symbols in a text page). This patch flushes the D-cache for such pages. Cc: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-04ARM: Remove __flush_icache_all() from __flush_dcache_page()Russell King
Both call sites for __flush_dcache_page() end up calling __flush_icache_all() themselves, so having __flush_dcache_page() do this as well is wasteful. Remove the duplicated icache flushing. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-04ARM: Move __flush_icache_all() out of flush_pfn_alias()Russell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-04ARM: Reduce __flush_dcache_page() visibilityRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-03ARM: 5845/1: l2x0: check whether l2x0 already enabledSrinidhi Kasagar
If running in non-secure mode accessing some registers of l2x0 will fault. So check if l2x0 is already enabled, if so do not access those secure registers. Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-03ARM: 5792/1: bcmring: clean up mach/io.hLeo Chen
removed old macro definition for io access, using the generic macros defined in asm/io.h Signed-off-by: Leo Hao Chen <leochen@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-01ARM: ZERO_PAGE: Avoid flush_dcache_page() for zero pageRussell King
The zero page is read-only, and has its cache state cleared during boot. No further maintanence for this page is required. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-01ARM: Avoid evaluating page_address() multiple timesRussell King
page_address() is a function call rather than a macro, and so: if (page_address(page)) do_something(page_address(page)); results in two calls to this function. This is unnecessary; remove the duplication. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-01ARM: Avoid duplicated implementation for VIVT cache flushingRussell King
We had two copies of the wrapper code for VIVT cache flushing - one in asm/cacheflush.h and one in arch/arm/mm/flush.c. Reduce this down to one common copy. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-30Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: Blackfin: fix SMP build error in start_thread() Blackfin: fix memset in smp_send_reschedule() and -stop() Blackfin: fix typo in ptrace poking Blackfin: check for anomaly 05000475 Blackfin: work around testset anomaly 05000477 Blackfin: update anomaly lists Blackfin: fix cache Kconfig typo Blackfin: fix suspend/resume failure with some on-chip ROMs
2009-11-30Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] Update mach-types ARM: 5793/1: ARM: Check put_user fail in do_signal when enable OABI_COMPAT MAINTAINERS: add maintainer information for AMBA primecell drivers [ARM] pxa/spitz: fix compile regression on spitz ARM: PNX4008: i2c-pnx: use the same dev_id for request_irq and free_irq [ARM] pxa/cpufreq: fix index assignments for end marker ARM: PNX4008: fix watchdog device driver name [ARM] kmap: fix build errors with DEBUG_HIGHMEM enabled
2009-11-30Merge branch 'merge' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc: Fix DEBUG_HIGHMEM build break from d4515646699
2009-12-01powerpc: Fix DEBUG_HIGHMEM build break from d4515646699Becky Bruce
Code was added to mm/higmem.c that depends on several kmap types that powerpc does not support. We add dummy invalid definitions for KM_NMI, KM_NM_PTE, and KM_IRQ_PTE. According to list discussion, this fix should not be needed anymore starting with 2.6.33. The code is commented to this effect so hopefully we will remember to remove this. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-30Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: sunsu: Use sunserial_console_termios() in sunsu_console_setup(). sunsu: Pass true 'ignore_line' to console match when RSC or LOM console. serial: suncore: Fix RSC/LOM handling in sunserial_console_termios(). serial: suncore: Add 'ignore_line' argument to sunserial_console_match(). sunsu: Fix detection of SU ports which are RSC console or control. sunsab: Do not set sunsab_reg.cons right before registering minors. sparc64: Fix definition of VMEMMAP_SIZE.
2009-11-30Merge branch 'fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq: [CPUFREQ] Enable ACPI PDC handshake for VIA/Centaur CPUs
2009-11-30parisc: fix unwind with recent gcc versionsHelge Deller
kernel unwinding is broken with gcc >= 4.x. Part of the problem is that binutils seems very sensitive to where the unwind information is stored. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Kyle McMartin <kyle@mcmartin.ca> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-11-25Merge branch 'mach-types'Russell King
2009-11-25[ARM] Update mach-typesRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-25Blackfin: fix SMP build error in start_thread()Graf Yang
Commit d5ce528c8e46fa5afb9 (Blackfin: convert irq/process to asm-generic) incorrectly merged the smp and non-smp cases of start_thread() causing the L1 stack to be setup on the SMP port instead of the UP port. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25Blackfin: fix memset in smp_send_reschedule() and -stop()Roel Kluin
To set zeroes the sizeof the struct should be used rather than sizeof the pointer, kzalloc does that. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25Blackfin: fix typo in ptrace pokingJie Zhang
Commit c014e15a2f667f9 (Blackfin: convert ptrace to new memory functions) introduced a copy & paste typo in the ptrace poke data/text handling. The access_process_vm() function call was telling it to read instead of write. Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25Blackfin: check for anomaly 05000475Mike Frysinger
Parts that have on-chip L2 SRAM cannot safely utilize writeback caching mode, so reject any attempts to use it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25Blackfin: work around testset anomaly 05000477Mike Frysinger
Ironically, the atomic testset instruction cannot be interrupted else it will produce incorrect results. So disable interrupts to help it out. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25Blackfin: update anomaly listsMike Frysinger
Add some recently documented anomalies (473, 474, 475, 477). Also stick a "do not edit" notice in here so people know these are copies of some master version. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25Blackfin: fix cache Kconfig typoAndré Goddard Rosa
The Kconfig option is "BFIN_EXTMEM_WRITETHROUGH", not "..._WRITETROUGH". Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25Blackfin: fix suspend/resume failure with some on-chip ROMsMichael Hennerich
Some Blackfin on-chip ROMs utilize some MDMA channels during the suspend and resume process, but don't clean up after themselves. So manually clear all DMA channels when resuming since no DMA could have been running at this point in time. Now Linux should be able to work regardless of any laziness on the part of the on-chip ROM or boot loader. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-24[CPUFREQ] Enable ACPI PDC handshake for VIA/Centaur CPUsHarald Welte
In commit 0de51088e6a82bc8413d3ca9e28bbca2788b5b53, we introduced the use of acpi-cpufreq on VIA/Centaur CPU's by removing a vendor check for VENDOR_INTEL. However, as it turns out, at least the Nano CPU's also need the PDC (processor driver capabilities) handshake in order to activate the methods required for acpi-cpufreq. Since arch_acpi_processor_init_pdc() contains another vendor check for Intel, the PDC is not initialized on VIA CPU's. The resulting behavior of a current mainline kernel on such systems is: acpi-cpufreq loads and it indicates CPU frequency changes. However, the CPU stays at a single frequency This trivial patch ensures that init_intel_pdc() is called on Intel and VIA/Centaur CPU's alike. Signed-off-by: Harald Welte <HaraldWelte@viatech.com> Signed-off-by: Dave Jones <davej@redhat.com>
2009-11-24ARM: 5791/1: ARM: MM: use 64bytes of L1 cache on plat S5PC1xxMarek Szyprowski
Samsung S5PC1xx SoCs are based on ARM Coretex8, which has 64 bytes of L1 cache line size. Enable proper handling of L1 cache on these SoCs. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-23sparc64: Fix definition of VMEMMAP_SIZE.David S. Miller
This was the cause of various boot failures on V480, V880, etc. systems. Kernel image memory was being overwritten because the vmemmap[] array was being sized to small. So if you had physical memory addresses past a certain point, the early bootup would spam all over variables in the kernel data section. The vmemmap mappings map page structs, not page struct pointers. And that was the key thinko in the macro definition. This was fixable thanks to the help, reports, and tireless patience of Hermann Lauer. Reported-by: Hermann Lauer <Hermann.Lauer@iwr.uni-heidelberg.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-23ARM: 5793/1: ARM: Check put_user fail in do_signal when enable OABI_COMPATJean PIHET
Using OABI, the call to put_user in do_signal can fail causing the calling app to hang. The solution is to check if put_user fails and force the app to seg fault in that case. Tested with multiple sleeping apps/threads (using the nanosleep syscall) and suspend/resume. Signed-off-by: janboe <janboe.ye at gmail.com> Signed-off-by: Jean Pihet <jpihet@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-22Merge branch 'fix' of ↵Russell King
git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
2009-11-22[ARM] pxa/spitz: fix compile regression on spitzPavel Machek
If CONFIG_AKITA is not set, spitz fails to compile. It worked ok in rc5. Fix is one more ifdef... Signed-off-by: Pavel Machek <pavel@ucw.cz> Acked-by: Stanislav Brabec <utx@penguin.cz> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-11-20[ARM] pxa/cpufreq: fix index assignments for end markerDaniel Mack
I stumbled over two small things regarding the .index field assignment in the dynamically created cpu frequency tables for pxa2xx and pxa3xx. Even though that doesn't currently cause any problem, it should still be fixed in case the logic in the CPUFREQ core changes. Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-11-20[ARM] kmap: fix build errors with DEBUG_HIGHMEM enabledRussell King
d451564 broke ARM by requiring KM_IRQ_PTE, KM_NMI and KM_NMI_PTE to always be defined. Solve this by providing invalid definitions for these constants, but only if CONFIG_DEBUG_HIGHMEM is enabled. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-18Merge branch 'fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq: [CPUFREQ] Fix stale cpufreq_cpu_governor pointer [CPUFREQ] Resolve time unit thinko in ondemand/conservative govs [CPUFREQ] speedstep-ich: fix error caused by 394122ab144dae4b276d74644a2f11c44a60ac5c [CPUFREQ] Fix use after free on governor restore [CPUFREQ] acpi-cpufreq: blacklist Intel 0f68: Fix HT detection and put in notification message [CPUFREQ] powernow-k8: Fix test in get_transition_latency() [CPUFREQ] longhaul: select Longhaul version 2 for capable CPUs
2009-11-18Merge branch 'omap-fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 * 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: OMAP: cs should be positive in gpmc_cs_free() omap: fix unlikely(x) < y omap3: clock: Fixed dpll3_m2x2 rate calculation omap3: clock: Fix the DPLL freqsel computations omap: Fix keymap for zoom2 according to matrix keypad framwork
2009-11-18OMAP: cs should be positive in gpmc_cs_free()Roel Kluin
The index `cs' is signed, test whether it is negative before we release gpmc_cs_mem[cs]. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2009-11-18omap: fix unlikely(x) < yRoel Kluin
The closing parenthesis was not in the right location. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2009-11-18Merge branch 'sh/for-2.6.32' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6 * 'sh/for-2.6.32' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: sh: Fixup last users of irq_chip->typename uio: pm_runtime_disable is needed if failed
2009-11-17[CPUFREQ] speedstep-ich: fix error caused by ↵Rusty Russell
394122ab144dae4b276d74644a2f11c44a60ac5c "[CPUFREQ] cpumask: avoid playing with cpus_allowed in speedstep-ich.c" changed the code to mistakenly pass the current cpu as the "processor" argument of speedstep_get_frequency(), whereas it should be the type of the processor. Addresses http://bugzilla.kernel.org/show_bug.cgi?id=14340 Based on a patch by Dave Mueller. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: Dominik Brodowski <linux@brodo.de> Reported-by: Dave Mueller <dave.mueller@gmx.ch> Cc: <stable@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Jones <davej@redhat.com>
2009-11-17[CPUFREQ] acpi-cpufreq: blacklist Intel 0f68: Fix HT detection and put in ↵John Villalovos
notification message Removing the SMT/HT check, since the Errata doesn't mention Hyper-Threading. Adding in a printk, so that the user knows why acpi-cpufreq refuses to load. Also, once system is blacklisted, don't repeat checks to see if blacklisted. This also causes the message to only be printed once, rather than for each CPU. Signed-off-by: John L. Villalovos <john.l.villalovos@intel.com> Signed-off-by: Dave Jones <davej@redhat.com>
2009-11-17[CPUFREQ] powernow-k8: Fix test in get_transition_latency()Roel Kluin
Not makes it a bool before the comparison. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Dave Jones <davej@redhat.com>
2009-11-17[CPUFREQ] longhaul: select Longhaul version 2 for capable CPUsKrzysztof Helt
There is a typo in the longhaul detection code so only Longhaul v1 or Longhaul v3 is selected. The Longhaul v2 is not selected even for CPUs which are capable of. Tested on PCChips Giga Pro board. Frequency changes work and the Longhaul v2 detects that the board is not capable of changing CPU voltage. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Dave Jones <davej@redhat.com>
2009-11-18sh: Fixup last users of irq_chip->typenameThomas Gleixner
The typename member of struct irq_chip was kept for migration purposes and is obsolete since more than 2 years. Fix up the leftovers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-sh@vger.kernel.org Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-17omap3: clock: Fixed dpll3_m2x2 rate calculationTero Kristo
Current calculation does not take into account any changes to M2 divisor, and thus when we change VDD2 OPP, dpll3_m2x2 rate does not change. Fixed by re-routing dpll3_m2x2 parent to dpll3_m2. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-17omap3: clock: Fix the DPLL freqsel computationsRajendra Nayak
Fix the freqsel value computation. Use n instead of (n+1) The formula in the TRM uses a zero-based N, hence the (n+1); however at this point in the clock34xx.c code, N is one-based. Hayati Bayrakdar <h-bayrakdar@ti.com> and Nishanth Menon <nm@ti.com> helped track down this bug. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> [paul@pwsan.com: modified commit message] Cc: Hayati Bayrakdar <h-bayrakdar@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>