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2009-11-04m32r: add NOTES to vmlinux.lds.S to remove .note.gnu.build-id sectionHirokazu Takata
Building with --build-id option, .note.gnu.build-id section is added to vmlinux.bin. But some old buggy binutils creates a huge vmlinux.bin, and a bootloader fails to boot its zImage as well. This patch adds a NOTES macro to a linker script vmlinux.ld.S to put .note.gnu.build-id section into .note section. Then, the .note section will be removed, because "-R .note" option is specified in OBJCOPYFLAGS to make a vmlinux.bin binary. Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
2009-11-04arch/m32r: Use DIV_ROUND_CLOSESTJulia Lawall
The kernel.h macro DIV_ROUND_CLOSEST performs the computation (x + d/2)/d but is perhaps more readable. The semantic patch that makes this change is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @haskernel@ @@ @depends on haskernel@ expression x,__divisor; @@ - (((x) + ((__divisor) / 2)) / (__divisor)) + DIV_ROUND_CLOSEST(x,__divisor) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
2009-11-03Merge branch 'for-linus' of git://github.com/at91linux/linux-2.6-at91Linus Torvalds
* 'for-linus' of git://github.com/at91linux/linux-2.6-at91: at91: at91sam9g45 family: identify several chip versions avr32: add two new at91 to cpu.h definition
2009-11-03xen: mask extended topology info in cpuidJeremy Fitzhardinge
A Xen guest never needs to know about extended topology, and knowing would just confuse it. This patch just zeros ebx in leaf 0xb which indicates no topology info, preventing a crash under Xen on cpus which support this leaf. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Cc: Stable Kernel <stable@kernel.org>
2009-11-03at91: at91sam9g45 family: identify several chip versionsNicolas Ferre
cpu_is_xxx() macros are identifying generic at91sam9g45 chip. This patch adds the capacity to differentiate Engineering Samples and final lots through the inclusion of at91_cpu_fully_identify() and the related chip IDs with chip version field preserved. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
2009-11-03avr32: add two new at91 to cpu.h definitionNicolas Ferre
Somme common drivers will need those at91 cpu_is_xxx() definitions. As at91sam9g10 and at91sam9g45 are on the way to linus' tree, here is the patch that adds those chips to cpu.h in AVR32 architecture. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2009-11-03Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (38 commits) MIPS: O32: Fix ppoll MIPS: Oprofile: Rename cpu_type from godson2 to loongson2 MIPS: Alchemy: Fix hang with high-frequency edge interrupts MIPS: TXx9: Fix spi-baseclk value MIPS: bcm63xx: Set the correct BCM3302 CPU name MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_store MIPS: Avoid potential hazard on Context register MIPS: Octeon: Use lockless interrupt controller operations when possible. MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinity MIPS: Set S-cache linesize to 64-bytes for MTI's S-cache MIPS: SMTC: Avoid queing multiple reschedule IPIs MIPS: GCMP: Avoid accessing registers when they are not present MIPS: GIC: Random fixes and enhancements. MIPS: CMP: Fix memory barriers for correct operation of amon_cpu_start MIPS: Fix abs.[sd] and neg.[sd] emulation for NaN operands MIPS: SPRAM: Clean up support code a little MIPS: 1004K: Enable SPRAM support. MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4 MIPS: Kconfig: Fix duplicate default value for MIPS_L1_CACHE_SHIFT. MIPS: MTI: Fix accesses to device registers on MIPS boards ...
2009-11-03Merge branch 'iommu/fixes' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu into x86/urgent
2009-11-03Merge branch 'fixes-s3c-2632-rc5' of git://git.fluff.org/bjdooks/linuxLinus Torvalds
* 'fixes-s3c-2632-rc5' of git://git.fluff.org/bjdooks/linux: ARM: S3C2410: Fix sparse warnings in arch/arm/mach-s3c2410/gpio.c ARM: S3C2440: mini2440: Fix spare warnings ARM: S3C24XX: Fix warnings in arch/arm/plat-s3c24xx/gpio.c ARM: S3C2440: mini2440: Fix missing CONFIG_S3C_DEV_USB_HOST ARM: S3C24XX: arch/arm/plat-s3c24xx: Move dereference after NULL test ARM: S3C: Fix adc function exports ARM: S3C2410: Fix link if CONFIG_S3C2410_IOTIMING is not set ARM: S3C24XX: Introduce S3C2442B CPU ARM: S3C24XX: Define a macro to avoid compilation error ARM: S3C: Add info for supporting circular DMA buffers ARM: S3C64XX: Set rate of crystal mux ARM: S3C64XX: Fix S3C64XX_CLKDIV0_ARM_MASK value
2009-11-03Merge branches 'amd-iommu/fixes' and 'dma-debug/fixes' into iommu/fixesJoerg Roedel
2009-11-03sched: Disable SD_PREFER_LOCAL at node levelMike Galbraith
Yanmin Zhang reported that SD_PREFER_LOCAL induces an order of magnitude increase in select_task_rq_fair() overhead while running heavy wakeup benchmarks (tbench and vmark). Since SD_BALANCE_WAKE is off at node level, turn SD_PREFER_LOCAL off as well pending further investigation. Reported-by: Zhang, Yanmin <yanmin_zhang@linux.intel.com> Signed-off-by: Mike Galbraith <efault@gmx.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-03[ARM] pxa: fix resume failure by saving/restoring IPRx registersHaojian Zhuang
Since interrupt handler is changed to use interrupt priority, we also need to save and restore these interrupt controller registers in suspend/resume routine. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Tested-by: Daniel Mack <daniel@caiaq.de> Tested-by: Pavel Machek <pavel@ucw.cz> Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-11-03[ARM] pxa/palm: fix incorrect initialization of Palm Tungsten C keyboardOndrej Zajicek
Palm Tungsten C keyboard structure has swapped rows/cols gpio structures and does not work. This patch fixes it. Signed-off-by: Ondrej Zajicek <santiago@crfreenet.org> Cc: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-11-03[ARM] pxa/zaurus: fix NAND flash OOB layout for BorzoiStanislav Brabec
Borzoi, Terrier and Akita use the same NAND Flash OOB layout, which seems to be different from Spitz for some reason. Here is a fix. When the code was ported to the platform data, the map was applied just for Akita. After this patch, Flash works again on Borzoi. Terrier still has a problem with partition table different from Borzoi (unfixable without reading of the system configuration in flash) and JFFS2 partitions can be mounted (with some "Empty flash at ... ends at ..." in the syslog). Signed-off-by: Stanislav Brabec <utx@penguin.cz> Acked-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-11-02Merge branch 'release' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: Revert "[IA64] fix percpu warnings" [IA64] fix percpu warnings [IA64] SMT friendly version of spin_unlock_wait() [IA64] use printk_once() unaligned.c/io_common.c [IA64] Require SAL 3.2 in order to do extended config space ops [IA64] unsigned cannot be less than 0 in sn_hwperf_ioctl() [IA64] Restore registers in the stack on INIT [IA64] Re-implement spinaphores using ticket lock concepts [IA64] Squeeze ticket locks back into 4 bytes.
2009-11-02Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: ensure initial page tables are setup for SMP systems ARM: 5776/1: Check compiler version and EABI support when adding ARM unwind support. ARM: 5774/1: Fix Realview ARM1176PB board reboot ARM: Fix errata 411920 workarounds ARM: Fix sparsemem with SPARSEMEM_EXTREME enabled ARM: Use GFP_DMA only for masks _less_ than 32-bit ARM: integrator: allow Integrator to be built with highmem ARM: Fix signal restart issues with NX and OABI compat
2009-11-02Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: Make EFI RTC function depend on 32bit again x86-64: Fix register leak in 32-bit syscall audting x86: crash_dump: Fix non-pae kdump kernel memory accesses x86: Side-step lguest problem by only building cmpxchg8b_emu for pre-Pentium x86: Remove STACKPROTECTOR_ALL
2009-11-02Revert "[IA64] fix percpu warnings"Tony Luck
This reverts commit b94b08081fcecf83fa690d6c5664f6316fe72208. genksyms currently cannot handle complicated types for exported percpu variables. Drop this patch for now as it prevents a module from being loaded on sn2 systems: xpc: no symbol version for per_cpu____sn_cnodeid_to_nasid xpc: Unknown symbol per_cpu____sn_cnodeid_to_nasid Signed-off-by: Tony Luck <tony.luck@intel.com>
2009-11-02ARM: ensure initial page tables are setup for SMP systemsRussell King
Mapping the same memory using two different attributes (memory type, shareability, cacheability) is unpredictable. During boot, we encounter a situation when we're updating the kernel's page tables which can lead to dirty cache lines existing in the cache which are subsequently missed. This causes stack corruption, and therefore a crash. Therefore, ensure that the shared and cacheability settings matches the configuration that will be used later; this together with the restriction in early_cachepolicy() ensures that we won't create a mismatch during boot. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-02ARM: 5776/1: Check compiler version and EABI support when adding ARM unwind ↵Claudio Scordino
support. ARM unwind is known to compile only with EABI and not-buggy compilers. The problem is not the unwinding information but the -fno-frame-pointer option added as a result of !CONFIG_FRAME_POINTER. Now we check the compiler and raise a #warning in case of wrong compiler. Signed-off-by: Claudio Scordino <claudio@evidence.eu.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-02x86: Add reboot quirk for 3 series Mac miniGottfried Haider
Reboot does not work out of the box on my "Early 2009" Mac mini (3,1). Detect this machine via DMI as we do for recent MacBooks. Signed-off-by: Gottfried Haider <gottfried.haider@gmail.com> Cc: Ozan Çağlayan <ozan@pardus.org.tr> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-02MIPS: O32: Fix ppollArnaud Patard
sys_ppoll syscall needs to use a compat handler on 64bit kernels with o32 user-space. Signed-off-by: Arnaud Patard <apatard@mandriva.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Oprofile: Rename cpu_type from godson2 to loongson2Wu Zhangjin
Unify the naming method between kernel and the user-space oprofile tool. Because loongson is used instead of godson in most of the places, we agreed to use loongson instead, which will simplify future maintenance. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Acked-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Alchemy: Fix hang with high-frequency edge interruptsManuel Lauss
The handle_edge_irq() flowhandler disables edge int sources which occur too fast (i.e. another edge comes in before the irq handler function had a chance to finish). Currently, the mask_ack() callback does not ack the edges in hardware, leading to an endless loop in the flowhandler where it tries to shut up the irq source. When I rewrote the alchemy IRQ code I wrongly assumed the mask_ack() callback was only used by the level flowhandler, hence it omitted the (at the time pointless) edge acks. Turned out I was wrong; so here is a complete mask_ack implementation for Alchemy IC, which fixes the above mentioned problem. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: TXx9: Fix spi-baseclk valueAtsushi Nemoto
TXx9 SPI bit rate is calculated by: fBR = fSPI / 2 / (n + 1) (fSPI is SPI master clock freq, i.e. imbusclk freq.) So use imbus_clk / 2 as a spi-baseclk. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: bcm63xx: Set the correct BCM3302 CPU nameFlorian Fainelli
For consistency with other BCM63xx SoC set the CPU name to "Broadcom BCM6338" when actually running on that system. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_storeZhang Le
Loongson 2 does not have dcache aliases when is using 16k pages. and the And because Loongson 2 doesn't do SMP , cpu_icache_snoops_remote_store does not matter here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Avoid potential hazard on Context registerRalf Baechle
set_saved_sp reads Context register. Avoid reading stale value from earlier incomplete write. Issue found and fixed for head.S by Chris Dearman <chris@mips.com>. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Octeon: Use lockless interrupt controller operations when possible.David Daney
Some newer Octeon chips have registers that allow lockless operation of the interrupt controller. Take advantage of them. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinityDavid Daney
Since the locks are used from interrupt context we need the irqsave/irqrestore versions of the locking functions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Set S-cache linesize to 64-bytes for MTI's S-cacheRalf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: SMTC: Avoid queing multiple reschedule IPIsJaidev Patwardhan
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: GCMP: Avoid accessing registers when they are not presentJaidev Patwardhan
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: GIC: Random fixes and enhancements.Chris Dearman
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: CMP: Fix memory barriers for correct operation of amon_cpu_startChris Dearman
Signed-off-by: Chris Dearman (chris@mips.com) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Fix abs.[sd] and neg.[sd] emulation for NaN operandsNigel Stephens
This patch ensures that the sign bit is always updated for NaN operands. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: SPRAM: Clean up support code a littleChris Dearman
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: 1004K: Enable SPRAM support.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4Ralf Baechle
Based on original patch by Chris Dearman <chris@mips.com>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Kconfig: Fix duplicate default value for MIPS_L1_CACHE_SHIFT.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: MTI: Fix accesses to device registers on MIPS boardsChris Dearman
This fixes the remaining problems introduced by f197465384bf7ef1af184c2ed1a4e268911a91e3 (incorrect access length & byteswapping in bigendian mode) Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Fix machine check exception in kmap_coherent()Kevin Cernekee
On an SMP system with cache aliases, the following sequence of events may happen: 1) copy_user_highpage() runs on CPU0, invoking kmap_coherent() to create a temporary mapping in the fixmap region 2) copy_page() starts on CPU0 3) CPU1 sends CPU0 an IPI asking CPU0 to run local_r4k_flush_cache_page() 4) CPU0 takes the interrupt, interrupting copy_page() 5) local_r4k_flush_cache_page() on CPU0 calls kmap_coherent() again 6) The second invocation of kmap_coherent() on CPU0 tries to use the same fixmap virtual address that was being used by copy_user_highpage() 7) CPU0 throws a machine check exception for the TLB address conflict Fixed by creating an extra set of fixmap entries for use in interrupt handlers. This prevents fixmap VA conflicts between copy_user_highpage() running in user context, and local_r4k_flush_cache_page() invoked from an SMP IPI. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: MTX-1: Fix build if CONFIG_PCI is disabled.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: AR7: register watchdog device only if enabled in hw configurationFlorian Fainelli
This patch checks if the watchdog enable bit is set in the DCL register meaning that the hardware watchdog actually works and if so, register the ar7_wdt platform_device. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: BCM63xx: Prepare for watchdog supportFlorian Fainelli
This patch prepares the board code to register a bcm63xx_wdt platform_device that we are going to use in a subsequent patch. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: BCM63xx: Make bcm63xx_uart_register an initfuncFlorian Fainelli
This patch removes the calls to bcm63xx_uart_register in board_bcm963xx.c and make bcm63xx_uart_register an initfunc. Allows us to remove bcm63xx_dev_uart.h which was there to make checkpatch.pl happy. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: AU1000: Fix build failure for db1x00 configured for Au1100 SoCFlorian Fainelli
This patch fixes the following warning, which becomes an error due to -Werror to be turned on: CC arch/mips/alchemy/common/gpiolib-au1000.o cc1: warnings being treated as errors arch/mips/alchemy/common/gpiolib-au1000.c: In function 'au1100_gpio2_to_irq': /home/florian/dev/kernel/linux-queue/arch/mips/include/asm/mach-au1x00/gpio-au1000.h:107: warning: control reaches end of non-void function Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: BCM63xx: Fix soft-reset lockup on BCM6345Florian Fainelli
This patch fixes a lockup on BCM6345 where setting the PLL soft reset bit will also lock the other blocks including UART. Instead of setting only the PLL soft reset bit in the software reset register, set this bit but do not touch the others. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: TXx9: Fix error handling / Fix for noenexisting gpio_remove.Ralf Roesch
Error was introduced by commit 0385d1f3d394c6814be0b165c153fc3fc254469a. Signed-off-by: Ralf Roesch <ralf.roesch@rw-gmbh.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Add IRQF_TIMER flag for timer interruptsWu Zhangjin
As the commit 3ee4c147 shows, we need to "Add IRQF_TIMER flag for timer interrupts", Atsushi Nemoto have reported that some other timer interrupts should be considered, Here it is. Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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