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2007-07-03Revert perfctr reservation to 2.6.21 stateAndi Kleen
With this change it works again when the nmi watchdog is disabled. Signed-off-by: Andi Kleen <ak@suse.de> Cc: Björn Steinbrink <B.Steinbrink@gmx.de> Cc: Stephane Eranian <eranian@hpl.hp.com> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-03Revert HPET resource reservationAndi Kleen
Matthias Lenk reports that the PCI subsystem would move the HPET on SB400/SB600-based systems, where the HPET is in BAR1 of the SMbus controller. The reason? The ACPI layer registered the PCI MMIO range as being busy too early, before PCI enumeration had happened, causing the PCI layer to decide that it should relocate the resources somewhere else. Firmware resources should be marked busy _after_ the PCI enumeration and probing has happened, not before. Remove the too-early reservation, we'll fix it up to do it properly later. In the meantime, this solves the regression. Tested-by: Matthias Lenk <matthias.lenk@amd.com> Cc: Aaron Durbin <adurbin@google.com> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-02Blackfin arch: update board defconfig filesMike Frysinger
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-06-25Blackfin arch: Fix up remaining printks with proper log levelsRobin Getz
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-06-25Blackfin arch: Add proper -mcpu option according to the cpu and silicon ↵Jie Zhang
revision configuration Add silicon revision "any" and "none". Add proper -mcpu option according to the cpu and silicon revision configuration. Need update to use latest Blackfin cross compile toolchain. Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-01PM: introduce set_target method in pm_opsRafael J. Wysocki
Commit 52ade9b3b97fd3bea42842a056fe0786c28d0555 changed the suspend code ordering to execute pm_ops->prepare() after the device model per-device .suspend() calls in order to fix some ACPI-related issues. Unfortunately, it broke the at91 platform which assumed that pm_ops->prepare() would be called before suspending devices. at91 used pm_ops->prepare() to get notified of the target system sleep state, so that it could use this information while suspending devices. However, with the current suspend code ordering pm_ops->prepare() is called too late for this purpose. Thus, at91 needs an additional method in 'struct pm_ops' that will be used for notifying the platform of the target system sleep state. Moreover, in the future such a method will also be needed by ACPI. This patch adds the .set_target() method to 'struct pm_ops' and makes the suspend code call it, if implemented, before executing the device model per-device .suspend() calls. It also modifies the at91 code to use pm_ops->set_target() instead of pm_ops->prepare(). Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Cc: Pavel Machek <pavel@ucw.cz> Cc: Johannes Berg <johannes@sipsolutions.net> Cc: Len Brown <lenb@kernel.org> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-01i386: mtrr crash fixAndrew Morton
Commit 3ebad5905609476a4ff1151a66b21d9794009961 ("[PATCH] x86: Save and restore the fixed-range MTRRs of the BSP when suspending") added mtrr operations without verifying that the CPU has MTRRs. Crashes transmeta CPUs. Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: <linux@horizon.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-01i386: remove bogus mtrr range checkLinus Torvalds
Commit 9215da33209b861b01c51382254b178a3fe92a30 "fixed" the MTRR range check to not allow any MTRR's under the 1MB mark (since that's where the fixed MTRR's are active). However, that was totally bogus, since it's normal (and almost required) to have a large variable MTRR that starts at 0, and covers some large percentage of the whole RAM, and then using the fixed MTRR's to override that large MTRR to handle the special ISA hole in the 640k-1M region. The old check was bogus too (checking that no variable MTRR is used that is entirely under the 1MB range), but at least it wasn't actively detrimental, because no sane situation would ever trigger such MTRR usage in the first place. That said, the whole notion of not allowing variable MTRR's in the low 1MB is just stupid, so rather than revert the commit, this just removes the whole sad and unnecessary check entirely. Cc: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Cc: Andrew Morton <akpm@linux-foundation.org> Tested-by: Luca Palermo <darkmage@sabayonlinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-29Merge branch 'master' of ↵Linus Torvalds
master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6 * 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: [SPARC64]: Add linux/pagemap.h to asm/tlb.h [SPARC64]: Need to set state to IDLE during sun4v IRQ enable. [SPARC64]: Fix VIRQ enabling. [SPARC64]: Add irqs to mdesc_node.
2007-06-29Fix VDSO gettimeofday() when called with NULL struct timeval.Will Schmidt
The vdso64 portion of patch 74609f4536f2b8fd6a48381bbbe3cd37da20a527 for fixing problems with NULL gettimeofday input mistakenly checks for a null tz field twice, when it should be checking for null tz once, and null tv once; by way of a r10/r11 typo. Any application calling gettimeofday(&tv,NULL) will "fail". This corrects that typo, and makes my G5 happy. Tested on G5. Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com> Cc: Tony Breeds <tony@bakeyournoodle.com> Forwarded-by: Ben Herrenschmidt <benh@kernel.crashing.org> [ Ben says: "I checked the 32 bits part of the change is correct. You can probably blame me for originally writing the 2 versions with inversed usage of r10 and r11, thus confusing Tony :-)" Ben duly blamed. - Linus ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-28Introduce fixed sys_sync_file_range2() syscall, implement on PowerPC and ARMDavid Woodhouse
Not all the world is an i386. Many architectures need 64-bit arguments to be aligned in suitable pairs of registers, and the original sys_sync_file_range(int, loff_t, loff_t, int) was therefore wasting an argument register for padding after the first integer. Since we don't normally have more than 6 arguments for system calls, that left no room for the final argument on some architectures. Fix this by introducing sys_sync_file_range2(int, int, loff_t, loff_t) which all fits nicely. In fact, ARM already had that, but called it sys_arm_sync_file_range. Move it to fs/sync.c and rename it, then implement the needed compatibility routine. And stop the missing syscall check from bitching about the absence of sys_sync_file_range() if we've implemented sys_sync_file_range2() instead. Tested on PPC32 and with 32-bit and 64-bit userspace on PPC64. Signed-off-by: David Woodhouse <dwmw2@infradead.org> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-28mips-jazz: correct flags for timer io resourceAlexey Dobriyan
arch/mips/jazz/setup.c:55:4: error: Initializer entry defined twice Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-28mtrr/cyrix: fix sectionsRandy Dunlap
main.c::mtrr_add() or mtrr_del() [exported] calls main.c::mtrr_add_page() or mtrr_del_page() or mtrr_restore() [resume] calls main.c::set_mtrr() calls main.c::ipi_handler() calls main.c::mtrr_if->set_all() == which can be cyrix_set_all WARNING: arch/i386/kernel/built-in.o(.text+0x8657): Section mismatch: reference to .init.data: (between 'cyrix_set_all' and 'centaur_get_free_region') WARNING: arch/i386/kernel/built-in.o(.text+0x866b): Section mismatch: reference to .init.data: (between 'cyrix_set_all' and 'centaur_get_free_region') WARNING: arch/i386/kernel/built-in.o(.text+0x867e): Section mismatch: reference to .init.data: (between 'cyrix_set_all' and 'centaur_get_free_region') WARNING: arch/i386/kernel/built-in.o(.text+0x8684): Section mismatch: reference to .init.data: (between 'cyrix_set_all' and 'centaur_get_free_region') WARNING: arch/i386/kernel/built-in.o(.text+0x868a): Section mismatch: reference to .init.data: (between 'cyrix_set_all' and 'centaur_get_free_region') Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-27Merge branch 'release' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] Make SN2 PCI code use ioremap rather than manually mangle the address [IA64] Force error to surface in nofault code [IA64] change sh_change_coherence oemcall to use nolock [IA64] remove duplicate header include line [IA64] Correct unwind validation code [IA64] is_power_of_2-ia64/mm/hugetlbpage.c
2007-06-26x86_64 irq: use mask/unmask and proper locking in fixup_irqs()Siddha, Suresh B
Force irq migration path during cpu offline, is not using proper locks and irq_chip mask/unmask routines. This will result in some races(especially the device generating the interrupt can see some inconsistent state, resulting in issues like stuck irq,..). Appended patch fixes the issue by taking proper lock and encapsulating irq_chip set_affinity() with a mask() before and an unmask() after. This fixes a MSI irq stuck issue reported by Darrick Wong. There are several more general bugs in this area(irq migration in the process context). For example, 1. Possibility of missing edge triggered irq. 2. Reliable method of migrating level triggered irq in the process context. We plan to look and close these in the near future. Eric says: In addition even with the fix from Suresh there is still at least one nasty hardware race in fixup_irqs(). However we exercise that code path rarely enough that we are unlikely to hit it in the real world, and that race seems to have existed since the code was merged. And a fix for that is not coming soon as it is an open investigation area if we can fix irq migration to work outside of irq context or if we have to rework the requirements imposed by the generic cpu hotplug and layer on fixup_irqs(). So this may come up again. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Eric W. Biederman <ebiederm@xmission.com> Reported-and-tested-by: Darrick Wong <djwong@us.ibm.com> Cc: Andi Kleen <ak@suse.de> Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-26x86_64: set the irq_chip name for lapicSuresh Siddha
set the irq_chip name for lapic. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-26Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 4449/1: more entries in arch/arm/boot/.gitignore [ARM] 4452/1: Force the literal pool dump before reloc_end [ARM] Update show_regs/oops register format [ARM] Add support for pause_on_oops and display preempt/smp options
2007-06-26Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Count timer interrupts correctly. [MIPS] SMTC and non-SMTC kernel and modules are incompatible [MIPS] EMMA2RH: Disable GEN_RTC, it can't possibly work. [MIPS] Remove a duplicated local variable in test_and_clear_bit() [MIPS] use compat_siginfo in rt_sigframe_n32 [MIPS] 20K: Handle WAIT related bugs according to errata information [MIPS] AP/SP requires shadow registers, auto enable support. [MIPS] Fix pb1500 reg B access [MIPS] Alchemy: Fix wrong cast [MIPS] remove "support for" from system type entry [MIPS] add io_map_base to pci_controller on Cobalt [MIPS] __ucmpdi2 arguments are unsigned long long.
2007-06-26[IA64] Make SN2 PCI code use ioremap rather than manually mangle the addressJes Sorensen
This one changes the SN2 specific PCI drivers to use ioremap() for obtaining the real address to access for the PCI registers instead of manually calculating them with __IA64_UNCACHED_OFFSET. The patch should have no real change when running on a normal Linux kernel, but when running as a paravirtualized it is needed. Signed-off-by: Jes Sorenson <jes@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2007-06-26[IA64] Force error to surface in nofault codeRuss Anderson
Montecito behaves slightly differently than previous processors, resulting in the MCA due to a failed PIO read to sometimes surfacing outside the nofault code. Adding an additional or and stop bits ensures the MCA surfaces in the nofault code. Signed-off-by: Russ Anderson <rja@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2007-06-26[IA64] remove duplicate header include lineMUNEDA Takahiro
Remove duplicate header include line from arch/ia64/kernel/time.c. Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2007-06-26[IA64] Correct unwind validation codeKeith Owens
Both rp_loc and pfs_loc can be in the register stack area _or_ they can be in the memory stack area, the latter occurs when a struct pt_regs is pushed. Correct the validation check on these fields to check for both stack areas. Not allowing for memory stack locations means no backtrace past ia64_leave_kernel, or any other code that uses PT_REGS_UNWIND_INFO. Signed-off-by: Keith Owens <kaos@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2007-06-26[IA64] is_power_of_2-ia64/mm/hugetlbpage.cvignesh babu
Replacing (n & (n-1)) in the context of power of 2 checks with is_power_of_2 Signed-off-by: vignesh babu <vignesh.babu@wipro.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2007-06-26[MIPS] Count timer interrupts correctly.Chris Dearman
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] EMMA2RH: Disable GEN_RTC, it can't possibly work.Ralf Baechle
Neither rtc_mips_get_time nor rtc_mips_set_time are being initialized by the EMMA2RH setup code, so genrtc at best was a RTC dummy avoiding a few error messages but not providing actual functionality. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] use compat_siginfo in rt_sigframe_n32Pavel Kiryukhin
Signed-off-by: Pavel Kiryukhin <vksavl@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] 20K: Handle WAIT related bugs according to errata informationRalf Baechle
We used to avoid the WAIT entirely on the 20K but really only need to do this on early revs of the 20K. Without this a 20K was a bit of a power hog. Well, in the lower power power hog category ;-) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] AP/SP requires shadow registers, auto enable support.Ralf Baechle
Noticed by Chris Dearman (chris@mips.com). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] Fix pb1500 reg B accessYoichi Yuasa
au_readl() is correct here. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] Alchemy: Fix wrong castYoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] remove "support for" from system type entryYoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] add io_map_base to pci_controller on CobaltYoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] __ucmpdi2 arguments are unsigned long long.Ralf Baechle
Reported by Eugene Surovegin <ebs@ebshome.net>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[SPARC64]: Need to set state to IDLE during sun4v IRQ enable.David S. Miller
This fixes hypervisor console interrupts on LDOM guests. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-06-26[SPARC64]: Fix VIRQ enabling.David S. Miller
We were doing the wrong call to turn them on, and also when enabling we need to forcefully set the state to IDLE. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-06-26[POWERPC] Fix subtle FP state corruption bug in signal return on SMPPaul Mackerras
This fixes a bug which can cause corruption of the floating-point state on return from a signal handler. If we have a signal handler that has used the floating-point registers, and it happens to context-switch to another task while copying the interrupted floating-point state from the user stack into the thread struct (e.g. because of a page fault, or because it gets preempted), the context switch code will think that the FP registers contain valid FP state that needs to be copied into the thread_struct, and will thus overwrite the values that the signal return code has put into the thread_struct. This can occur because we clear the MSR bits that indicate the presence of valid FP state after copying the state into the thread_struct. To fix this we just move the clearing of the MSR bits to before the copy. A similar potential problem also occurs with the Altivec state, and this fixes that in the same way. Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-26[POWERPC] Fix VDSO gettimeofday() when called with NULL struct timevalTony Breeds
Consider the prototype for gettimeofday(): int gettimofday(struct timeval *tv, struct timezone *tz); Although it is valid to call with /either/ tv or tz being NULL, and the C version of sys_gettimeofday() supports this, the current version of gettimeofday() in the VDSO will SEGV if called with a NULL tv. This adds a check for tv being NULL so that it doesn't SEGV. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-26[POWERPC] Update defconfigsPaul Mackerras
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-26[POWERPC] Update g5_defconfigwill schmidt
Update the g5_defconfig with default settings. This is to keep things up to date, and specifically to ensure that the CONFIG_MACINTOSH_DRIVERS option is enabled. This also turns on CONFIG_MSI. Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com> cc: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-25[ARM] 4449/1: more entries in arch/arm/boot/.gitignoreNicolas Pitre
Signed-off-by: Nicolas Pitre <npitre@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-06-25[ARM] 4452/1: Force the literal pool dump before reloc_endCatalin Marinas
In the arch/arm/boot/compressed/head.S file, the contents of the literal pool accumulated during the relocatable code must be dumped before reloc_end. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-06-24ACPI: preserve the ebx value in acpi_copy_wakeup_routineTian Kevin
Register %ebx serves as the "global offset table base register" for position-independent code. For absolute code, %ebx serves as a local register and has no specified role in the function calling sequence. In either case, a function must preserve the register value for the caller. acpi_copy_wakeup_routine overrides %ebx without saving it, this may corrupt the called data. Kevin found that most time the value of Sx is saved in %esi, however sometimes compiler also uses %ebx. When this happens, suspends fails since sleep value in ebx is changed by acpi_copy_wakeup_routine. The same funtion in X86_64 doesn't have this problem. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Looks-okay-to: Pavel Machek <pavel@ucw.cz> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Cc: Len Brown <lenb@kernel.org> Acked-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-24x86_64: fix misplaced `continue' in mce.cJoshua Wise
Background: When a userspace application wants to know about machine check events, it opens /dev/mcelog and does a read(). Usually, we found that this interface works well, but in some cases, when the system was taking large numbers of machine check exceptions, the read() would hang. The system would output a soft-lockup warning, and the daemon reading from /dev/mcelog would suck up as much of a single CPU as it could spinning in system space. Description: This patch fixes this bug. In particular, there was a "continue" inside a timeout loop that presumably was intended to break out of the outer loop, but instead caused the inner loop to continue. This patch also makes the condition for the break-out a little more evident by changing a !time_before to a time_after_eq. Result: The read() no longer hangs in this test case. Testing: On my system, I could replicate the bug with the following command: # for i in `seq 15000`; do ./inject_sbe.sh; done where inject_sbe.sh contains commands to inject a single-bit error into the next memory write transaction. Patch: This patch is against git f1518a088bde6aea49e7c472ed6ab96178fcba3e. Signed-off-by: Joshua Wise <jwise@google.com> Signed-off-by: Tim Hockin <thockin@google.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-24alpha: fix alignment problem in csum_ipv6_magic()Ivan Kokshaysky
Hopefully this fixes http://bugzilla.kernel.org/show_bug.cgi?id=8635 The struct in6_addr passed to csum_ipv6_magic() is 4 byte aligned, so we can't use the regular 64-bit loads. Since the cost of handling of 4 byte and 1 byte aligned 64-bit data is roughly the same, this code can cope with any src/dst [mis]alignment. Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Richard Henderson <rth@twiddle.net> Cc: Dustin Marquess <jailbird@alcatraz.fdf.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-23[AVR32] Update defconfigsHaavard Skinnemoen
Update defconfigs for ATNGW100 and ATSTK1002. This will enable the SLUB allocator by default on both, and will enable NFS root on ATSTK1002 (ATNGW100 had it enabled before.) Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-06-23[AVR32] Initialize dma_mask and dma_coherent_maskDavid Brownell
The current at32ap7000 platform devices aren't declared as supporting DMA, so that layered drivers can't tell whether they need to manage DMA. This patch makes all those platform devices report that they support DMA. Most do, but in a few cases this is inappropriate. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-06-23[AVR32] NGW100, Remove relics of the old USART mapping schemeben.nizette@iinet.net.au
USART mapping used to be accomplished by the manual filling of at32_usart_map[] and at32_nr_usarts. This has now been replaced with at32_map_usart() so we can remove these variables. Signed-off-by: Ben Nizette <ben.nizette@iinet.net.au> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-06-23[AVR32] Fix bug in invalidate_dcache_region()Haavard Skinnemoen
If (start + size) is not cacheline aligned and (start & mask) > (end & mask), the last but one cacheline won't be invalidated as it should. Fix this by rounding `end' down to the nearest cacheline boundary if it gets adjusted due to misalignment. Also flush the write buffer unconditionally -- if the dcache wrote back a line just before we invalidated it, the dirty data may be sitting in the write buffer waiting to corrupt our buffer later. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-06-22x86_64: Ignore compat mode SYSCALL when IA32_EMULATION is not definedAndi Kleen
Previously a program could switch to a compat mode segment and then execute SYSCALL and it would jump to an uninitialized MSR and crash the kernel. Instead supply a dummy target for this case. Pointed out by Jan Beulich Cc: jbeulich@novell.com Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-22i386: Make CMPXCHG64 only dependent on PAEAndi Kleen
It is only used for PAE kernels in set_64bit. The problem is that due to a old Windows bug many CPUs need magic MSRs to enable CMPXCHG64, and we can't do that nicely early enough before it is potentially used. But since we only need it in PAE kernels so only force the checking for CMPXCHG65 with PAE. This fixes a boot failure on Transmeta Crusoe Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>