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path: root/drivers/char/agp/intel-agp.c
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2010-04-17Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: Ignore LVDS EDID when it is unavailabe or invalid drm/i915: Add no_lvds entry for the Clientron U800 drm/i915: Rename many remaining uses of "output" to encoder or connector. drm/i915: Rename intel_output to intel_encoder. agp/intel: intel_845_driver is an agp driver! drm/i915: introduce to_intel_bo helper drm/i915: Disable FBC on 915GM and 945GM.
2010-03-30include cleanup: Update gfp.h and slab.h includes to prepare for breaking ↵Tejun Heo
implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-25agp/intel: intel_845_driver is an agp driver!Daniel Vetter
... not a GTT driver. So the additional chipset flush introduced in commit 2162e6a2b0cd5acbb9bd8a3c94e1c1269b078295 Author: Dave Airlie <airlied@redhat.com> Date: Wed Nov 21 16:36:31 2007 +1000 agp/intel: Add chipset flushing support for i8xx chipsets. to fix a GTT problem makes absolutely no sense. If this would really be needed for AGP chipsets, too, we should add it to all i8xx agp drivers, not just one. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
2010-03-18agp/intel: Don't do the chipset flush on Sandybridge.Eric Anholt
This CPU should be coherent with graphics in this direction, though flushing graphics caches are still required. Fixes a system reset on module load on Sandybridge with 4G+ memory. Signed-off-by: Eric Anholt <eric@anholt.net>
2010-03-18agp/intel: Respect the GTT size on Sandybridge for scratch page setup.Eric Anholt
This is similar to 14bc490bbdf1b194ad1f5f3d2a0a27edfdf78986 which respected it for how much of the GTT we would actually use. Now we won't clear beyond allocated memory when filling the GTT with scratch page addresses. Signed-off-by: Eric Anholt <eric@anholt.net>
2010-03-08Merge branch 'for-next' into for-linusJiri Kosina
Conflicts: Documentation/filesystems/proc.txt arch/arm/mach-u300/include/mach/debug-macro.S drivers/net/qlge/qlge_ethtool.c drivers/net/qlge/qlge_main.c drivers/net/typhoon.c
2010-03-04Merge branch 'drm-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (151 commits) vga_switcheroo: disable default y by new rules. drm/nouveau: fix *staging* driver build with switcheroo off. drm/radeon: fix typo in Makefile vga_switcheroo: fix build on platforms with no ACPI drm/radeon: Fix printf type warning in 64bit system. drm/radeon/kms: bump the KMS version number for square tiling support. vga_switcheroo: initial implementation (v15) drm/radeon/kms: do not disable audio engine twice Revert "drm/radeon/kms: disable HDMI audio for now on rv710/rv730" drm/radeon/kms: do not preset audio stuff and start timer when not using audio drm/radeon: r100/r200 ums: block ability for userspace app to trash 0 page and beyond drm/ttm: fix function prototype to match implementation drm/radeon: use ALIGN instead of open coding it drm/radeon/kms: initialize set_surface_reg reg for rs600 asic drm/i915: Use a dmi quirk to skip a broken SDVO TV output. drm/i915: enable/disable LVDS port at DPMS time drm/i915: check for multiple write domains in pin_and_relocate drm/i915: clean-up i915_gem_flush_gpu_write_domain drm/i915: reuse i915_gpu_idle helper drm/i915: ensure lru ordering of fence_list ... Fixed trivial conflicts in drivers/gpu/vga/Kconfig
2010-02-26drm/i915: Add dependency on the intel agp moduleZhenyu Wang
See http://bugzilla.kernel.org/show_bug.cgi?id=15021 Make sure that the appropriate AGP module is loaded and probed before trying to set up the DRM. The DRM already depends on the AGP core, but in this case we know the specific AGP driver we need too, and can help users avoid the trap of loading the AGP driver after the DRM driver. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2010-02-26agp/intel: Add a new Sandybridge HB/IG PCI ID combo.Eric Anholt
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-02-26drm/i915, agp/intel: Fix stolen memory size on SandybridgeZhenyu Wang
New memory control config reg at 0x50 should be used for stolen memory size detection on Sandybridge. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2010-02-26agp/intel: Use a non-reserved value for the cache field of the PTEs.Eric Anholt
I don't know if this is what we'll want to be using long term, we'll see. Signed-off-by: Eric Anholt <eric@anholt.net>
2010-02-26agp/intel: Add support for Sandybridge.Eric Anholt
Signed-off-by: Eric Anholt <eric@anholt.net>
2010-02-22agp/intel: official names for Pineview and IronlakeZhenyu Wang
Print official names for Pineview and Ironlake, which is Intel GMA3150 and Intel HD graphics. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2010-02-09tree-wide: Assorted spelling fixesDaniel Mack
In particular, several occurances of funny versions of 'success', 'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address', 'beginning', 'desirable', 'separate' and 'necessary' are fixed. Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Joe Perches <joe@perches.com> Cc: Junio C Hamano <gitster@pobox.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-01-22intel-agp: Switch to wbinvd_on_all_cpusBorislav Petkov
Simplify if-statement while at it. [ hpa: we need to #include <asm/smp.h> ] Cc: Dave Jones <davej@redhat.com> Cc: David Airlie <airlied@linux.ie> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> LKML-Reference: <1264172467-25155-3-git-send-email-bp@amd64.org> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-15drm/i915: enable 36bit physical address for hardware status pageZhenyu Wang
This enables possible 36bit address mask on 965G that use physical address for hw status page. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-12-10Merge remote branch 'anholt/drm-intel-next' into drm-linusDave Airlie
Pull more Intel changes in, especially one to init the GTT properly
2009-12-08Merge remote branch 'anholt/drm-intel-next' into drm-linusDave Airlie
This merges the upstream Intel tree and fixes up numerous conflicts due to patches merged into Linus tree later in -rc cycle. Conflicts: drivers/char/agp/intel-agp.c drivers/gpu/drm/drm_dp_i2c_helper.c drivers/gpu/drm/i915/i915_irq.c drivers/gpu/drm/i915/i915_suspend.c
2009-12-07agp/intel-agp: Clear entire GTT on startupDavid Woodhouse
Some BIOSes fail to initialise the GTT, which will cause DMA faults when the IOMMU is enabled. We need to clear the whole thing to point at the scratch page, not just the part that Linux is going to use. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> [anholt: Note that this may also help with stability in the presence of driver bugs, by not drawing to memory we don't own] Signed-off-by: Eric Anholt <eric@anholt.net>
2009-12-07agp/intel: Fix product names and #definesAdam Jackson
IGD* isn't a useful name. Replace with the codenames, as sourced from pci.ids. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-11-30Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: Select CONFIG_SHMEM drm/i915: Fix CRT hotplug detect by checking really no channels attached agp/intel: new host bridge support drm/i915: Add more registers save/restore for Ironlake suspend drm/i915: Fix IRQ stall issue on Ironlake drm/i915: HDMI hardware workaround for Ironlake drm/i915: Fix and cleanup DPLL calculation for Ironlake drm/i915: Avoid potential sleep whilst holding spinlock
2009-11-19agp/intel-agp: Set dma_mask for capable chipsets before agp_add_bridge()David Woodhouse
We should set this before calling agp_add_bridge() so that it's done before we map the scratch page too. This should probably fix the regression reported as k.o. bug #14627. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-11-12agp/intel: new host bridge supportZhenyu Wang
Add new CPU host bridge id, needed for support Ironlake graphics device with it. No change for graphics device itself, so no need to update drm/i915. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-24Merge branch 'drm-intel-next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel * 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (57 commits) drm/i915: Handle ERESTARTSYS during page fault drm/i915: Warn before mmaping a purgeable buffer. drm/i915: Track purged state. drm/i915: Remove eviction debug spam drm/i915: Immediately discard any backing storage for uneeded objects drm/i915: Do not mis-classify clean objects as purgeable drm/i915: Whitespace correction for madv drm/i915: BUG_ON page refleak during unbind drm/i915: Search harder for a reusable object drm/i915: Clean up evict from list. drm/i915: Add tracepoints drm/i915: framebuffer compression for GM45+ drm/i915: split display functions by chip type drm/i915: Skip the sanity checks if the current relocation is valid drm/i915: Check that the relocation points to within the target drm/i915: correct FBC update when pipe base update occurs drm/i915: blacklist Acer AspireOne lid status ACPI: make ACPI button funcs no-ops if not built in drm/i915: prevent FIFO calculation overflows on 32 bits with high dotclocks drm/i915: intel_display.c handle latency variable efficiently ... Fix up trivial conflicts in drivers/gpu/drm/i915/{i915_dma.c|i915_drv.h}
2009-09-15Merge branch 'agp-next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6 * 'agp-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6: agp/intel: remove restore in resume agp: fix uninorth build intel-agp: Set dma mask for i915 agp: kill phys_to_gart() and gart_to_phys() intel-agp: fix sglist allocation to avoid vmalloc() intel-agp: Move repeated sglist free into separate function agp: Switch agp_{un,}map_page() to take struct page * argument agp: tidy up handling of scratch pages w.r.t. DMA API intel_agp: Use PCI DMA API correctly on chipsets new enough to have IOMMU agp: Add generic support for graphics dma remapping agp: Switch mask_memory() method to take address argument again, not page
2009-09-14agp/intel: remove restore in resumeZhenyu Wang
As early pci resume has already restored config for host bridge and graphics device, don't need to restore it again, This removes an original order hack for graphics device restore. This fixed the resume hang issue found by Alan Stern on 845G, caused by extra config restore on graphics device. Cc: Stable Team <stable@kernel.org> Cc: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-09-11agp/intel: Fix the pre-9xx chipset flush.Eric Anholt
Ever since we enabled GEM, the pre-9xx chipsets (particularly 865) have had serious stability issues. Back in May a wbinvd was added to the DRM to work around much of the problem. Some failure remained -- easily visible by dragging a window around on an X -retro desktop, or by looking at bugzilla. The chipset flush was on the right track -- hitting the right amount of memory, and it appears to be the only way to flush on these chipsets, but the flush page was mapped uncached. As a result, the writes trying to clear the writeback cache ended up bypassing the cache, and not flushing anything! The wbinvd would flush out other writeback data and often cause the data we wanted to get flushed, but not always. By removing the setting of the page to UC and instead just clflushing the data we write to try to flush it, we get the desired behavior with no wbinvd. This exports clflush_cache_range(), which was laying around and happened to basically match the code I was otherwise going to copy from the DRM. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Brice Goglin <Brice.Goglin@ens-lyon.org> Cc: stable@kernel.org
2009-09-08agp/intel: Add B43 chipset supportFabian Henze
Signed-off-by: Fabian Henze <hoacha@quantentunnel.de> [Fix reversed HB & IG ids for B43] Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-02agp/intel: support for new chip variant of IGDNG mobileZhenyu Wang
New variant of IGDNG mobile chip has new host bridge id. [anholt: Note that this new PCI ID doesn't impact the DRM, which doesn't care about the PCI ID of the bridge] Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-08-05intel-agp: Set dma mask for i915David Woodhouse
If DMAR is configured in but absent, we really do want to make sure that the dma mask is set appropriately. Otherwise we get mapping failures on highmem. Spotted by Zhenyu Wang. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03agp: kill phys_to_gart() and gart_to_phys()David Woodhouse
There seems to be no reason for these -- they're a 1:1 mapping on all platforms. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03intel-agp: fix sglist allocation to avoid vmalloc()David Woodhouse
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03intel-agp: Move repeated sglist free into separate functionDavid Woodhouse
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03agp: Switch agp_{un,}map_page() to take struct page * argumentDavid Woodhouse
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03agp: tidy up handling of scratch pages w.r.t. DMA APIDavid Woodhouse
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03intel_agp: Use PCI DMA API correctly on chipsets new enough to have IOMMUZhenyu Wang
When graphics dma remapping engine is active, we must fill gart table with dma address from dmar engine, as now graphics device access to graphics memory must go through dma remapping table to get real physical address. Add this support to all drivers which use intel_i915_insert_entries() Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03agp: Switch mask_memory() method to take address argument again, not pageDavid Woodhouse
In commit 07613ba2 ("agp: switch AGP to use page array instead of unsigned long array") we switched the mask_memory() method to take a 'struct page *' instead of an address. This is painful, because in some cases it has to be an IOMMU-mapped virtual bus address (in fact, shouldn't it _always_ be a dma_addr_t returned from pci_map_xxx(), and we just happen to get lucky most of the time?) Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-06-20agp/intel: Make intel_i965_mask_memory use dma_addr_t for physical addressesPierre Willenbrock
Otherwise, the high bits to be stuffed in the unused lower bits of the page address are lost. Signed-off-by: Pierre Willenbrock <pierre@pirsoft.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-06-19agp: switch AGP to use page array instead of unsigned long arrayDave Airlie
This switches AGP to use an array of pages for tracking the pages allocated to the GART. This should enable GEM on PAE to work a lot better as we can pass highmem pages to the PAT code and it will do the right thing with them. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-06-05agp/intel: Add support for new chipsetsZhenyu Wang
Both desktop and mobile versions are added. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-04-13intelfb: support i854Stefan Husemann
Support the Intel 854 Chipset in fbdev. We test and use the patch on a Thomson IP1101 IPTV-Box. On the VGA-Port we get a normal signal. Here is the link to the Mambux-Project: http://www.mambux.de Cc: Keith Packard <keithp@keithp.com> Cc: Dave Airlie <airlied@linux.ie> Cc: Krzysztof Helt <krzysztof.h1@poczta.fm> Signed-off-by: Stefan Husemann <shusemann@googlemail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-03-27agp/intel: Add support for new intel chipset.Shaohua Li
This is a G33-like desktop and mobile chipset. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-03-10intel-agp: fix a panic with 1M of shared memory, no GTT entriesLubomir Rintel
When GTT size is equal to amount of video memory, the amount of GTT entries is computed lower than zero, which is invalid and leads to off-by-one error in intel_i915_configure() Originally posted here: http://bugzilla.kernel.org/show_bug.cgi?id=12539 http://bugzilla.redhat.com/show_bug.cgi?id=445592 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Cc: Lubomir Rintel <lkundrak@v3.sk> Cc: Dave Airlie <airlied@linux.ie> Reviewed-by: Eric Anholt <eric@anholt.net> Cc: <stable@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-12-29agp/intel: Fix broken ® symbol in device name.Eric Anholt
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-12-29agp/intel: add support for G41 chipsetZhenyu Wang
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-10-20Update email addresses.Dave Jones
Update assorted email addresses and related info to point to a single current, valid address. additionally - trivial CREDITS entry updates. (Not that this file means much any more) - remove arjans dead redhat.com address from powernow driver Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-10-16Merge branch 'agp-next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6 * 'agp-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6: agp/nvidia: Support agp user-memory on nvidia agp. agp/amd-k7: Suspend support for AMD K7 GART driver agp/intel: Reduce extraneous PCI posting reads during init agp: Fix stolen memory counting on G4X.
2008-10-16agp/intel: Reduce extraneous PCI posting reads during initKeith Packard
Instead of doing a posting read after each GTT entry update, do a single one at the end of the writes. This should reduce boot time a tiny amount by avoiding a lot of extra uncached reads. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-16agp: Fix stolen memory counting on G4X.Eric Anholt
On the GM45, the amount of stolen memory mapped to the GTT was underestimated, even though we had 508KB more available since the GTT doesn't take from stolen memory. On the non-GM45 G4X, we overestimated how much stolen was mapped to the GTT by 4KB, resulting in GPU page faults when that page was accessed. This update requires a corresponding update to xf86-video-intel to work correctly. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-08-22Merge branch 'x86/urgent' into x86/patIngo Molnar
Conflicts: arch/x86/mm/pageattr.c Signed-off-by: Ingo Molnar <mingo@elte.hu>