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2009-07-16drm/i915: handle FIFO oversubsription correctlyJesse Barnes
If you're pushing a plane hard (i.e. you need most or all of the FIFO entries just to cover your frame refresh latency), the watermark level may end up being negative. So fix up the signed vs. unsigned math in the calculation function to handle this correctly, giving all available FIFO entries to such a configuration. Reported-by: Eric Anholt <eric@anholt.net> Tested-by: Eric Anholt <eric@anholt.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-15drm/radeon/kms: fix hotspot handling on pre-avivo chipsAlex Deucher
Need to adjust CUR_OFFSET for yorigin Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: enable frac fb divs on rs600/rs690/rs740Alex Deucher
Allows us to hit dot clocks much closer, especially on chips with non-27 Mhz reference clocks like most IGP chips. This fixes most flickering and blanking problems with non-exact dot clocks on these chips. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: add PLL flag to prefer frequencies <= the target freqAlex Deucher
This is needed when using fractional feedback dividers on some IGP chips. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: block RN50 from using 3D engine.Dave Airlie
RN50/ES1000 is a cut-down rv100 chip used in the server market. The 3D engine on these is either not there or unverified so refuse any attempt to configure registers on it. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: fix VRAM sizing like DDX does it.Dave Airlie
Doing this like the DDX seems like the most sure fire way to avoid having to reinvent it slowly and painfully. At the moment we keep getting things wrong with aper vs vram, so we know the DDX does it right. booted on PCI r100, PCIE rv370, IGP rs400. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/ttm/radeon: add dma32 support.Dave Airlie
This add support for using dma32 memory on gpus that really need it. Currently IGPs are left without DMA32 but we might need to change that unless we can fix rs690. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon: Endianness fixes for radeondrmfb.Michel Dänzer
For now handle it via r/g/b offsets and disallow 16 bpp modes on big endian machines. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: don't swap PCIEGART PTEs in VRAM.Dave Airlie
On powerpc, since we aren't using any hw swappers, this will get flipped around by default in hw. tested on a G5 + rv515. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: drop zero length CS indirect buffers.Dave Airlie
If userspace sends a zero length IB, it really shouldn't have bothered so EINVAL it. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: fix vram vs aper size check.Dave Airlie
Fix this to be correct like the DDX code, looks like a typo on transfer to the kernel. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: get lvds info for DIG LVTMA and UNIPHY encodersAlex Deucher
Noticed by Rafał Miłecki on dri-devel. On r6xx/r7xx hardware, laptop panels can be driven by KLDSCP_LVTMA or UNIPHY. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: fix quirk for MSI laptopAlex Deucher
The line mux for the connector in the bios tables is used for enumerating drm connectors. Since this laptop has a quirk where the same line much is listed for both VGA and LVDS, the connectors get combined. Setting the line mux on LVDS to an unused value prevents both encoders from being combined into the same connector. This should fix bko bug 13720. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15ttm: Fix caching mode selection.Thomas Hellstrom
A bug caused a new caching state to be selected on each buffer object validation regardless of the current caching state. Moreover, a caching state could be selected that wasn't supported by the memory type. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon: fix support for vline relocations.Dave Airlie
Userspace sends us a special relocation type to sync video/exa to vlines to avoid tearing, this deals with the relocation in the kernel, it picks the correct crtc and avoids issues where crtcs are disabled. This version also parses the wait until to make sure it isn't trying to do anything evil. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: respect TOM on rs100->rs480 IGP variants.Dave Airlie
Normally we are free to place VRAM where we want in the GPUs memory address space, however on IGP chips the VRAM is actual RAM, and no special translation or aperture is used inside the GPU MC. So when you move the VRAM aperture away from the TOM register, you actually move it into main memory and can trash things quite badly. This commit makes the code respect the TOM location for MC_FB_LOCATION. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: set crtc and cursor offsets correctly on legacy chips.Dave Airlie
The crtc and cursor offsets on the legacy chips are offset from DISPLAY_BASE_ADDR. The code worked if display base addr was at 0, but otherwise falls to pieces. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: remove IB flushing trick.Dave Airlie
If there is a problem then this is hiding it, we shouldn't ever need to flush the IB. Either the buffers are: WB - caching just works. WC - no need to do explicit flush, the MB + readback will do it Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: mmio base/size should be resource_size_t.Dave Airlie
Unsigned long is incorrect for 64-bit resources on 32-bit hw. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm/radeon/kms: fix some GART table entry bugs.Dave Airlie
1. rv370 can accept 40-bit addresses - also at 24-bit shift not 4 bits 2. rs480 table can be in 40-bit space. - 4 bit shift for top 8 bits 3. rs480 table entries can be in 40-bit space. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-15drm: Move a dereference below a NULL testJulia Lawall
If the NULL test is necessary, then the dereference should be moved below the NULL test. The semantic patch that makes this change is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @@ type T; expression E; identifier i,fld; statement S; @@ - T i = E->fld; + T i; ... when != E when != i if (E == NULL) S + i = E->fld; // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-07-15drm/ttm: fix misplaced parenthesesRoel Kluin
Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-07-15drm/via: Fix vblank IRQ on VIA hardware.Simon Farnsworth
via_enable_vblank wasn't setting the VBlank enable bit - instead, it was masking out the rest of the register. At the same time, fix via_disable_vblank to clear the VBlank enable bit. Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-07-15drm: drm_gem, check kzalloc retvalJiri Slaby
Check kzalloc retval against NULL in drm_gem_object_alloc and bail out appropriately. While at it merge the fail paths and jump to them by gotos at the end of the function. Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-07-15drm: drm_debugfs, check kmalloc retvalJiri Slaby
Check kmalloc return value in drm_debugfs_create_files and bail out appropriately if the pointer is NULL. Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-07-14drm/i915: FIFO watermark calculation fixesJesse Barnes
I discovered several bugs in the FIFO code that was recently applied. Some of them fell into the "how did this ever work" category, since in some cases we were using the wrong FIFO size values, and the calculations ended up being way off. This patch fixes all the bugs I found, and works well on my GM45, 915GM and 855GM test machines; but as usual with these sorts of patches broader testing is definitely requested (in particular this patch affects 830, 845 and 865 for which I don't have test hardware). Overall, the patch clarifies the watermark calculation function by adding some comments and debug info, and making the variable names a bit clearer. The "get FIFO size" portion of the code has also been corrected, so we should be able to properly detect the FIFO allocations for each pipe, for use in the watermark calculation. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-13drm/i915: ignore lvds on AOpen Mini PC MP-915Tormod Volden
This motherboard thinks it has an LVDS connected, so without this patch the screen goes blank on the connected VGA monitor. More information (for the non-KMS case) in fd.o bug #18004. Signed-off-by: Tormod Volden <debian.tormod@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-13drm/i915: Allow frame buffers up to 4096x4096 on 915/945 class hardwareKeith Packard
The 915 and 945 scanout engines can handle frame buffers up to 4096 pixels wide. Pre-9xx hardware has an 8192 byte stride limit, and so we leave the existing 2048 max in place. I'm not sure why we limit the height to the same value; there's no intrinsic hardware limit in the scanout engine. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-13drm/i915: refactor error detection & collectionJesse Barnes
This patch refactors the existing error detection and collection code, placing most of it in i915_handle_error(). Additionally, we introduce a work queue for scheduling post-crash tasks such as generating a uevent. Using the uevent facility, userspace should be able to capture a post-mortem dump for diagnostics. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-13drm/i915: Set lvds dual channel according to register from vbiosFlorian Mickler
Vbios will set lvds register correctly based on current algorithm for lingle/dual Channel LVDS when system boot, so we can accept this configuration directly, regardless of LVDS enable status. It fixed freedesktop.org bug #22262 Signed-off-by: Florian Mickler <florian@mickler.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-10drm/i915: Fix for LVDS VBT change on IGDNGZhenyu Wang
IGDNG mobile chip's LVDS data block removes panel fitting register definition. So this fixes offset for LVDS timing block parsing. Thanks for Michael Fu to catch this. Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-10drm/i915: Zap the GTT mapping when transitioning from untiled to tiled.Eric Anholt
As of 52dc7d32b88156248167864f77a9026abe27b432, we could leave an old linear GTT mapping in place, so that apps trying to GTT-mapped write in tiled data wouldn't get the fence added, and garbage would get displayed. Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-10drm/i915: Refactor calls to unmap_mapping_rangeChris Wilson
As we call unmap_mapping_range() twice in identical fashion, refactor and attempt to explain why we need to call unmap_mapping_range(). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-10drm/i915: Avoid saving/restore the modesetting registers twice in KMS modeZhao Yakui
In KMS mode we now use the normal mode-setting paths to set the modes back to the current configuration, so we don't need to also run the more limited non-KMS implementation of modesetting for resume. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-10drm: Disable the unused connectors explicitly when resuming with KMS.Zhao Yakui
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Acked-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-10drm/i915: Restore the KMS modeset for every activated CRTCZhao Yakui
Restore the modeset for every activated CRTC in course of resume. This is realized by calling the function of drm_helper_resume_force_mode. Note: it is meaningful only for the KMS mode. https://bugs.freedesktop.org/show_bug.cgi?id=21719 https://bugs.freedesktop.org/show_bug.cgi?id=21708 https://bugs.freedesktop.org/show_bug.cgi?id=22285 https://bugs.freedesktop.org/show_bug.cgi?id=22263 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-10drm/i915: Fix harmless warning from patch merged after i2c rework.Eric Anholt
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-10drm/i915: Disable GEM when a broken video BIOS takes up the whole aperture.Eric Anholt
This is seen on some G41 systems, where the BIOS will consume all but a few KB of the aperture. This should be bad for all operating systems, as it means that the OS can't dynamically manage memory between graphics and the rest of the system, and OSes that did static memory management statically add memory in addition to the BIOS allocation anyway. So, instead of working around it, just fail out verbosely. fd.o bug #21574 Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2009-07-09drm/i915: Check the LID device to decide whether the LVDS should be initializedZhao Yakui
On some boxes the mobile chipset is used and there is no LVDS device. In such case we had better not initialize the LVDS output device so that one pipe can be used for other output device. For example: E-TOP. But unfortunately the LVDS device is still initialized on the boxes based on mobile chipset in KMS mode. It brings that this pipe occupied by LVDS can't be used for other output device. After checking the acpidump we find that there is no LID device on such boxes. In such case we can use the LID device to decide whether the LVDS device should be initialized. If there is no LID device, we can think that there is no LVDS device. It is unnecessary to initialize the LVDS output device. If there exists the LID device, it will continue the current flowchart. Maybe on some boxes there is no LVDS device but the LID device is found. In such case it should be added to the quirk list. http://bugs.freedesktop.org/show_bug.cgi?id=21496 http://bugs.freedesktop.org/show_bug.cgi?id=21856 http://bugs.freedesktop.org/show_bug.cgi?id=21127 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [anholt: squashed in style fixups] Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-07drm/i915: Move lock to more reasonable locationBen Gamari
Make this consistent with the unlock statement. Also fix a minor typo in debugfs formatting Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-07drm/i915: Add gtt_offset to gem object list debugfs outputBen Gamari
This is quite useful for verifying that objects are actually mapped when they need to be. Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-07drm/i915: Remove gtt_bound from drm_i915_gem_objectBen Gamari
This wasn't even used as far as I could tell and will only confuse people (like me). Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-07drm/i915: Disable VGA output when doing DRM_MODE_DPMS_OFF.ling.ma@intel.com
Signed-off-by: Ma Ling <ling.ma@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-07drm/i915: crt fetch EDID by DVI-I converter on G4x platformling.ma@intel.com
Usually crt mainly get modes via GPIOA ports. However on G4X platform we need to probe possible ports for DVI-I, which could be wired to GPIOD, then fetch our desired EDID, i.e on DG45ID platform we successfully fetch EDID by GPIOD port. It fixed freedesktop.org bug #21084 Signed-off-by: Ma Ling <ling.ma@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-07drm/i915: Don't update display FIFO watermark on IGDNGZhenyu Wang
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-02drm/i915: Adjust DisplayPort clocks to use 96MHz referenceKeith Packard
For some reason, the DP clocks were based off a 100MHz reference instead of the standard 96MHz reference. This caused some DP monitors to fail to lock to the signal. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-01drm/i915: Make driver less chattyKeith Packard
Convert many printk calls to DRM_DEBUG calls to reduce kernel log noise for normal activities. Switch other printk calls to DRM_ERROR or DRM_INFO. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-01drm/i915: fix up a raw 64bit divideAndy Whitcroft
We are seeing compilation failures on i386 in some environments due to an undefined reference as below: ERROR: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined! This is generated due to a raw 64 bit divide in the i915 driver. Fix up this raw divide. Signed-off-by: Andy Whitcroft <apw@canonical.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-01drm/i915: enable sdvo lvds scaling function.ling.ma@intel.com
Currently we implemented basic sdvo lvds function, But except for sdvo lvds fixed mode, we can not switch to other modes, otherwise display get black. The patch handle three operations to enable sdvo lvds. At first duplicate sdvo fixed mode for adjustment, then according to fixed mode line valid all modes, at last adjust input mode to fit our requirement. Acked by Li Peng <peng.li@linux.intel.com> Signed-off-by: Ma Ling <ling.ma@intel.com> Reviewed-by: Ian Romanick <idr@freedesktop.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-01drm/i915: Set SSC frequency for 8xx chips correctlyling.ma@intel.com
All 8xx class chips have the 66/48 split, not just 855. Signed-off-by: Ma Ling <ling.ma@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
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