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path: root/drivers/mtd/nand/fsl_elbc_nand.c
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2009-01-28powerpc: More printing warning fixes for the l64 to ll64 conversionStephen Rothwell
These are all powerpc specific drivers. res.start in fsl_elbc_nand.c needs to be cast since it may be either 32 or 64 bit. Thanks to Scott Wood for noticing. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Arnd Bergmann <arnd@arndb.de> call_edac bits in particular Acked-by: Olof Johansson <olof@lixom.net> pasemi_nand peices Acked-by: Scott Wood <scottwood@freescale.com> fsl_elbc fixes Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-12-10[MTD] [NAND] Set the fsl elbc ECCM according the settings in bootloader.Jason Jin
The ECCM maybe set in bootloader, Get ECCM settings from the bootloader, can avoid the image written by bootloader cannot read out by kernel. But the limitation of doing it this way is that, it could break large page NAND if it is written with NAND disabled in u-boot and read with NAND enabled, or vice versa. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-10-13[MTD] remove unused mtd parameter in of_mtd_parse_partitions()Sebastian Andrzej Siewior
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-07-30[MTD] [NAND] fsl_elbc_nand.c: fix printk warningakpm@linux-foundation.org
drivers/mtd/nand/fsl_elbc_nand.c:890: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'resource_size_t' Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-07-25[MTD] [NAND] fsl_elbc_nand: fix section mismatch with CONFIG_MTD_OF_PARTS=yAnton Vorontsov
With CONFIG_MTD_OF_PARTS=y I'm getting this new section mismatch in reference from the function fsl_elbc_chip_probe() to the function .devinit.text:of_mtd_parse_partitions() This patch fixes the mismatch by providing __devinit annotation to the fsl_elbc_chip_probe() function. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-By: Scott Wood <scottwood@freescale.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-07-11[MTD] [NAND] fsl_elbc_nand: ecclayout cleanupsAnton Vorontsov
This patch deletes oobavail assignments, they're calculated by the nand core code in nand_scan_tail, plus current oobavail values are wrong for the LP NANDs. Also remove mtd->ecclayout and mtd->oobavail assignments, mtd core handles this all by itself. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-07-11[MTD] [NAND] fsl_elbc_nand: implement support for flash-based BBTAnton Vorontsov
This patch implements support for flash-based BBT for chips working through ELBC NAND controller, so that NAND core will not have to re-scan for bad blocks on every boot. Because ELBC controller may provide HW-generated ECCs we should adjust bbt pattern and bbt version positions in the OOB free area. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-07-11[MTD] [NAND] fsl_elbc_nand: fix OOB workability for large page NAND chipsAnton Vorontsov
For large page chips, nand_bbt is looking into OOB area, and checking for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be reserved for bbt means. But ELBC driver is specifying ecclayout so that oobfree area starts at offset 1, so only one byte left for the bbt purposes. This causes problems with any OOB users, namely JFFS2: after first mount JFFS2 will fill all OOBs with "erased marker", so OOBs will contain: OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff And on the next boot, NAND core will rescan for bad blocks, then will see "0xff 0x19" pattern, and will mark all blocks as bad ones. To fix the issue we should implement our own bad block pattern: just one byte at OOB start. Though, this will work only for x8 chips. For x16 chips two bytes must be checked. Since ELBC driver does not support x16 NANDs (yet), we're safe for now. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-06-07[MTD] [NAND] fsl_elbc_nand: fix section mismatch between probe and removeAnton Vorontsov
WARNING: drivers/mtd/nand/built-in.o(.devinit.text+0x114): Section mismatch in reference from the function fsl_elbc_ctrl_probe() to the function .devexit.text:fsl_elbc_ctrl_remove() __devinit functions should not call functions with __devexit. Since probe function calls remove in case of errors, we want to remove __devexit attribute from it. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-22[MTD] [NAND] fsl_elbc_nand: workaround for hangs during nand writeAnton Vorontsov
Using current driver elbc sometimes hangs during nand write. Reading back last byte helps though (thanks to Scott Wood for the idea). Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-22[MTD] [NAND] corrected MPC8313 NAND fixesMike Hench
Fix a race condition in fsl_elbc_run_command Fix incorrect usage of clearbits32 that bashed option register Remove work around for bashed register Signed-off-by: Mike Hench <mhench@elutions.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-22[MTD] [NAND] fsl_elbc_nand: fix mtd nameAnton Vorontsov
Currently fsl_elbc_nand doesn't initialize mtd->name, and this causes nand_get_flash_type() to assign name that is equal to chip type, like this: root@b1:~# cat /proc/mtd dev: size erasesize name mtd0: 00800000 00010000 "fe000000.flash" mtd1: 02000000 00004000 "NAND 32MiB 3,3V 8-bit" mtd0 is physmap_of flash (normal name), and mtd1 is fsl_elbc_nand. Despite inconsistency, with mtd name like this specifying paritions from the kernel command line becomes a torture (though, I didn't tried and not sure if mtdparts= can handle spaces at all). Plus, this causes real bugs when multiple fsl_elbc_nand chips registered. With this patch applied fsl_elbc_nand chip will have proper name: root@b1:~# cat /proc/mtd dev: size erasesize name mtd0: 00800000 00010000 "fe000000.flash" mtd1: 02000000 00004000 "e0600000.flash" p.s. We can't use priv->dev->bus_id as in physmap_of, because fsl_elbc_nand pretends to be a localbus controller, so its bus_id is "address.localbus", which is incorrect and thus will also not work for multiple chips. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-22[MTD] [NAND] fsl_elbc_nand: Fix SEQIN handling for large pages.Scott Wood
Previously, a READ command was erroneously issued rather than SEQIN. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-17[POWERPC] fsl_elbc_nand: factor out localbus definesAnton Vorontsov
This is needed to support other localbus peripherals, such as NAND on FSL UPM. Signed-off-by: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-02-07[MTD] [NAND] Freescale enhanced Local Bus Controller FCM NAND support.Scott Wood
Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>