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Add support for a number of new PHY's in the AT91RM9200 Ethernet driver.
- Teridian 78Q21x3
- SMSC LAN83C185
(Patch from Luca Gamma)
- National Semiconductor DP83848
(Patches from Ivan Kuten & Thomas Foldesi)
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Move the global 'check_timer' variable into the private data structure.
Also now use mod_timer().
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Moved global ether_clk variable into controller data structure.
Patch from David Brownell.
Davicom 9161 PHY was being incorrectly displayed as "9196".
Patch from Brian Stafford.
clk_get() doesn't return NULL on error, so the return value needs to be
tested with IS_ERR().
Whitespace cleanup.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
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This patch adds support for the Ethernet controller integrated in the
Atmel AT91RM9200 SoC processor.
Changes since the previous submission (01/02/2006) are:
- Make use of the clk.h clock infrastructure.
- The multicast hash function is not crc32. [Patch by Pedro Perez]
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
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