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path: root/drivers/net/bnx2x_reg.h
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2009-03-02bnx2x: Supporting new BCM8726 FWEilon Greenstein
Microcode download requires write of another register and read from "Limiting/LRM mode" register before setting Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-03-02bnx2x: Misleading nameEilon Greenstein
As noted by Ben Hutchings <bhutchings@solarflare.com>, these are the capabilities offsets and not the ID itself Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-15bnx2x: Using registers nameEilon Greenstein
Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-15bnx2x: Pre emphasis configurationEilon Greenstein
Supporting non-default pre-emphasis settings for the internal and some external PHYs Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-15bnx2x: Using the HW 5th laneEilon Greenstein
This 1G interface (on top of the 4 lanes 10G interface) requires additional setting to work in CL45 Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-15bnx2x: EMAC resetEilon Greenstein
The NIG_ENABLE does not reset the emac. Replace it with explicit reset Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-15bnx2x: PHY lock listEilon Greenstein
Some dual port PHY require HW lock since they are used by both interfaces (different driver instances). Since this list is getting longer, update a parameter at load time instead of calculating it on runtime Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-15bnx2x: Supporting BCM8726 PHYEilon Greenstein
Also adding the ability to recognize the optic module and disable it if it is not authorized for safety reasons - since this feature might upset some users which are willing to take the risk, it is optional and can be disabled by setting an nvram bit (or a trivial driver patch to set this bit). This dual port PHY requires special handling if the ports are swapped. Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-15bnx2x: GPIO accessoriesEilon Greenstein
A GPIO is used with the 8726 PHY. Adding the GPIO related functions in this Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-15bnx2x: Flow control enhancementEilon Greenstein
Setting better HW thresholds and enabling FW capabilities for better enforcement. Also set the HW to more efficiently use the internal buffers if this is a single port design Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-15bnx2x: Disabling interrupts after iSCSI-bootEilon Greenstein
Before initializing the chip after iSCSI boot, the interrupts of the function that was used to boot must be disabled. That means that the driver needs to set the chip as if it is the iSCSI PCI function - this bug is exposed only with MSI Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-15bnx2x: MSI supportEilon Greenstein
Enabling MSI on top of MSI-X and INTA. Also changing the module parameter to allow choosing INTA or MSI even when MSI-X is available. The default status block should not be reversed for endianity. Since MSI can issue re-configuration, the interrupt disable function now requires mmiowb Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-15bnx2x: New FWEilon Greenstein
This is the FW blob and the relevant definitions without any logic. It also contains the minimal mandatory code changes to work with this FW but it does not contain enabling of the new features that this FW provides. This FW is needed for: - More efficient multi-queue - per queue statistics - Big-endian issue with MSI - Improved pause response Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-01-19bnx2x: Version updateEilon Greenstein
Updating the version and the year of updated files Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-08-13bnx2x: Spelling mistakesEilon Greenstein
Spelling mistakes Spelling has to L's in it... Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-08-13bnx2x: Pause settingsYaniv Rosner
Pause settings - 1G pause was not working due to missing write to the emac block (TX_MODE_FLOW_EN) - The flow control should use the negotiated result (after autoneg) so we should save both the requested autoneg and the result - The HW credits with flow control at 1G speed were not optimized and caused low throughput - It is recommended to turn off flow control if the MTU is bigger than 5000B due to internal buffers size Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-08-13bnx2x: Link order with external PHYYaniv Rosner
Link order with external PHY When external PHY exists (second chip with the PHY to translate to another physical medium) the link with the eternal PHY and the network should be established before setting the link between the 5771x and the PHY. This is the right order and it is important when using autoneg - the link to the network should use the autoneg and the link between the two chips should be forced to the network result. Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-08-13bnx2x: PBA Table Page Alignment WorkaroundEilon Greenstein
PBA Table Page Alignment Workaround The PBA table starts on the middle of the page and that's causing very low performance with virtualization. The solution is not to update via the BAR directly but via chip access to the same memory Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-08-13bnx2x: HW attention lockEilon Greenstein
HW attention lock Making sure that only one function will handle the HW attention. This makes the device parameter aeu_mask redundant so it is removed Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-08-13bnx2x: HW lock mechanismYitchak Gertner
HW lock mechanism Enhancing the HW lock to work per function and not only per port - this is needed for the next patch that protects races over HW attention detection between the different functions. At this chance, changing the functions names to be more inline with the current naming convention Signed-off-by: Yitchak Gertner <gertner@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-08-13bnx2x: Load/Unload under trafficVladislav Zolotarov
Load/Unload under traffic Few issues were found when loading and unloading under traffic: - When receiving Tx interrupt call netif_wake_queue if the queue is stopped but the state is open - Check that interrupts are enabled before doing anything else on the msix_fp_int function - In nic_load, enable the interrupts only when needed and ready for it - Function stop_leading returns status since it can fail - Add 1ms delay when unloading the driver to validate that there are no open transactions that already started by the FW - Splitting the "has work" function into Tx and Rx so the same function will be used on unload and interrupts - Do not request for WoL if only resetting the device (save the time that it takes the FW to set the link after reset) - Fixing the device reset after iSCSI boot and before driver load - all internal buffers must be cleared before the driver is loaded Signed-off-by: Vladislav Zolotarov <vladz@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-08-13bnx2x: StatisticsYitchak Gertner
Statistics - Making sure that each drop is accounted for in the driver statistics - Clearing the FW statistics when driver is loaded to prevent inconsistency with HW statistics - Once error is detected (bnx2x_panic_dump), stop the statistics before other actions (currently it is stopped last and can corrupt the data) - Adding HW checksum error counter to the statistics - Removing unused variable stats_ticks - Using macros instead of magic numbers to indicate which statistics are shared per port and which are per function Signed-off-by: Yitchak Gertner <gertner@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-06-23bnx2x: Add support for BCM57711 HWEilon Greenstein
Supporting the 57711 and 57711E - refers to in the code as E1H. The 57710 is referred to as E1. To support the new members in the family, the bnx2x structure was divided to 3 parts: common, port and function. These changes caused some rearrangement in the bnx2x.h file. A set of accessories macros were added to make access to the bnx2x structure more readable Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-06-23bnx2x: New link codeYaniv Rosner
New Link code: Moving all the link related code (including the calculations, the initialization of the MAC and PHY and the external PHY's code) into a separated file. The changes from the code that used to be part of bnx2x.c (now called bnx2x_main.c) are: - Using separate structures for link inputs and link outputs to clearly identify what was configured and what is the outcome - Adding code to read external PHY FW version and print it as part of ethtool -i - Adding code to upgrade external PHY FW from ethtool -E with special magic number - Changing the link down indication to ERR level - Adding a lock on all PHY access to prevent an interrupt and setting changes to overlap - Adding support for emulation and FPGA (small chunk of code that really helps in the lab) - Adding support for 1G on BCM8706 PHY - Adding clear debug print incase of fan failure (the PHY type is now "failure") Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-02-28[BNX2X]: Correct Link managementEliezer Tamir
Properly protect PHY access between two devices on the same board with a HW lock. Use GPIO to clear all previous configurations before changing link parameters. Shut down the external PHY in case of fan failure. Reducing the MDC/MDIO clock to 2.5MHz due to problems with some devices. Resolve the flow control response according to autoneg with external PHY. Unmasking all PHY interrupts in single write to prevent a race in the interrupts order. LASI indication fixes to work with peculiarities of PHYs. Disable MAC RX to avoid a HW bug when closing the MAC under traffic. Disable parallel detection on HiGig due to HW limitation. Updating the shared memory structure to work with the current bootcode. Signed-off-by: Eliezer Tamir <eliezert@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-01-28add bnx2x driver for BCM57710Eliezer Tamir
Signed-off-by: Eliezer Tamir <eliezert@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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