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path: root/drivers/net/e1000e/ich8lan.c
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2009-11-21e1000e: cosmetic - group local variables of the same typeBruce Allan
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: remove redundant might_sleep()Bruce Allan
Now that mutex_lock() calls might_sleep() the driver doesn't have to here. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: do not error out on identification LED init failureBruce Allan
A failure to initialize the identification LED is not a fatal condition and should allow the init path to continue. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: cleanup functions that clear hardware statisticsBruce Allan
The e1000_clear_hw_cntrs_*() functions read the registers to clear them. There is no reason to save the register contents so the temp variable can be removed. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: set bools to true/false instead of 1/0Bruce Allan
Set booleans to 'true' or 'false' to make it clear it is a boolean. Also change instances of TRUE/FALSE in comments to lowercase true/false. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: update copyright informationBruce Allan
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: cleanup ops function pointersBruce Allan
The phy and nvm operations structures have function pointers that contain "phy" and "nvm" in the pointer names which are redundant since the structures are already obviously in phy and nvm structures. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: consolidate two dbug macros into one simpler oneBruce Allan
This patch depends on a previous one that cleans up redundant #includes. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: cleanup redundant #include'sBruce Allan
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: disable K1 on PCH LOM when in PHY loopback modeBruce Allan
When performing the ethtool PHY loopback test on PCH-based LOMs (82577 and 82578), disable K1 (a MAC-PHY interconnect low power mode) otherwise packets might get corrupted. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-29e1000e: rework disable K1 at 1000Mbps for 82577/82578Bruce Allan
This patch reworks a previous workaround (commit 7d3cabbcc) for an issue in hardware where noise on the interconnect between the MAC and PHY could be generated by a lower power mode (K1) at 1000Mbps resulting in bad packets. Disable K1 while at 1000 Mbps but keep it enabled for 10/100Mbps and when the cable is disconnected. The original version of this workaround was found to be incomplete. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-29e1000e: config PHY via software after resetsBruce Allan
On PCH-based (82577/82578) and some ICH8-based parts (82566) there is an issue with the hardware automatically configuring the PHY with contents from the EEPROM after the PHY is reset, so do the configuration by the driver instead. This was already similarly done for some 82566 parts in e1000_phy_hw_reset_ich8lan() but needs to be done after other resets, so move the PHY configuration code to its own function and call after all PHY resets. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-26e1000e: allow for swflag to be held over consecutive PHY accessesBruce Allan
PCH-based parts (82577/82578) and some ICH8-based parts (82566) need to hold the swflag (sw/fw/hw hardware semaphore) over consecutive PHY accesses in order to perform sw-driven PHY configuration during initialization to workaround known hardware issues (see follow-on patch). This patch provides new PHY read/write functions (and function pointers) that will allow accessing the PHY registers assuming the swflag has already been acquired. The actual PHY register access code has moved into helper functions that are called with a flag indicating whether or not the swflag has already been acquired and acquires/releases it if not. The functions called from within the updated PHY access functions had to be updated to assume the swflag was already acquired, and other functions that called those functions were also updated to acquire/release the swflag. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-26e1000e: separate mutex usage between NVM and PHY/CSR register for ICHx/PCHBruce Allan
Accesses to NVM and PHY/CSR registers on ICHx/PCH-based parts are protected from concurrent accesses with a mutex that is acquired when the access is initiated and released when the access has completed. However, the two types of accesses should not be protected by the same mutex because the driver may have to access the NVM while already holding the mutex over several consecutive PHY/CSR accesses which would result in livelock. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-26e1000e: 82577/82578 requires a different method to configure LPLUBruce Allan
Unlike previous ICHx-based parts, the PCH-based parts (82577/82578) require LPLU (Low Power Link Up, or "reverse auto-negotiation") to be configured in the PHY rather than the MAC. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-26e1000e: increase swflag acquisition timeout for ICHx/PCHBruce Allan
In some conditions (e.g. when AMT is enabled on the system), it is possible to take an extended period of time to for the driver to acquire the sw/fw/hw hardware semaphore used to protect against concurrent access of a shared resource (e.g. PHY registers). This could cause PHY registers to not get configured properly resulting in link issues. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-26e1000e: clear PHY wakeup bit after LCD reset on 82577/82578Bruce Allan
Performing a dummy read of the PHY Wakeup Control (WUC) register clears the wakeup enable bit set by an PHY reset. If this bit remains set, link problems may occur. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-22e1000e: reset the PHY on 82577/82578 when going to SxBruce Allan
The PHY on 82577/82578 parts needs a soft reset when transitioning to Sx state in order for the PHY write which disables gigabit speed to take effect. Gigabit speed must be disabled in order for the PHY writes to registers on page 800 (the wakeup control registers) to work as expected otherwise the system might not wake via WoL. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-08-09e1000e: fix potential NVM corruption on ICH9 with 8K bank sizeBruce Allan
The bank offset was being incorrectly calculated on ICH9 parts with a bank size of 8K (instead of the more common 4K bank) which would cause any NVM writes to be done on the wrong address after switching from bank 1 to bank 0. Additionally, assume we are meant to use bank 0 if a valid bank is not detected, and remove the unnecessary acquisition of the SW/FW/HW semaphore when writing to the shadow ram version of the NVM image. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-08-09e1000e: fix acquisition of SW/FW/HW semaphore for ICHx partsBruce Allan
For ICHx parts, write the EXTCNF_CTRL.SWFLAG bit once when trying to acquire the SW/FW/HW semaphore instead of multiple times to prevent the hardware from having problems (especially for systems with manageability enabled), and extend the timeout for the hardware to set the SWFLAG bit. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-07-03e1000e: disable K1 at 1000Mbps for 82577/82578Bruce Allan
This workaround is required for an issue in hardware where noise on the interconnect between the MAC and PHY could be generated by a lower power mode (K1) at 1000Mbps resulting in bad packets. Disable K1 while at 1000 Mbps but keep it enabled for 10/100Mbps and when the cable is disconnected. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-07-03e1000e: prevent NVM corruption on sectors larger than 4KBruce Allan
Limit NVM writes to 4K sections to prevent NVM corruption on larger sector allocations (up to 64K). Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-07-03e1000e: do not write SmartSpeed register bits on parts without supportBruce Allan
The driver was accessing register bits for features on parts that do not support that feature. This could cause problems in the hardware. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-07-03e1000e: delay after LCD reset and proper checks for PHY configuration doneBruce Allan
A previous workaround for 82578 to avoid link stall causes some PHY registers to get cleared inadvertently. Add a delay after all LCD resets to make sure PHY registers are in a stable state before continuing. Also, after resets check the EEC register for the state of PHY configuration performed by the MAC for ICH9 and earlier parts (as done before), but check the LAN_INIT_DONE bit in the STATUS register for ICH10 and newer parts (EEC doesn't exist in these newer parts). Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-06-03e1000e: workaround a Tx hang on 82577/82578Bruce Allan
With bi-directional stress traffic, the receiver could hang causing the hardware to stop and a "Detected Tx Unit Hang" message dumped to the system logfile. Temporarily workaround this issue by disabling Tx flow control by default. The issue is currently being investigated and a follow-on patch will be provided to revert this when it is resolved. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-06-03e1000e: add support for 82577/82578 GbE LOM partsBruce Allan
This patch provides support for the next generation Intel desktop and mobile gigabit ethernet LOM adapters. These adapters are the follow-on parts to the LOMs tied to the prior ICH chipsets and are comprised of a MAC in the PCH chipset and an external PHY (82577 for mobile and 82578 for desktop versions). New features consist of PHY wakeup to save power by completely turning off the MAC while in Sx state, and 4K jumbo frames. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-06-03e1000e: specify max supported frame size in adapter structBruce Allan
By putting the maximum frame size supported by the hardware into the adapter structure, the change_mtu entry point function can be cleaned up of checks for all the different max frame sizes supported by Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-14e1000e: Remove mutex_trylock and associated WARN on failure.dave graham
Single-thread access must be ensured for ICH8 NVM and PHY operations. This synchronization is provided by the nvm_mutex. To assist in understanding the contexts from which this code could be reached, a WARN was output if the mutex was not going to be immediately acquirable (if !mutex_trylock()). The code has now been optimized, and we have verified that the few remaining mutex contentions are reasonable and non-blocking, and it is time to remove the mutex_trylock() and WARN messages. Signed-off-by: dave graham <david.graham@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-01-11e1000e: Add process name to WARN message when detecting Mutex contentionDavid Graham
Adds process name of the current mutex holder to the WARN message output when the e1000e driver attempts to acquire the nvm_mutex and finds that it is already being held. With this patch the WARN message indicates both the process name of the current mutex holder and the process name of the attempted acquisition, which together will help to identify the contending codepaths. Signed-off-by: David Graham <david.graham@intel.com> Acked-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-12-15Merge branch 'master' of ↵David S. Miller
master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6 Conflicts: drivers/net/e1000e/ich8lan.c
2008-12-11e1000e: fix double release of mutexJeff Kirsher
During a reset, releasing the swflag after it failed to be acquired would cause a double unlock of the mutex. Instead, test whether acquisition of the swflag was successful and if not, do not release the swflag. The reset must still be done to bring the device to a quiescent state. This resolves [BUG 12200] BUG: bad unlock balance detected! e1000e http://bugzilla.kernel.org/show_bug.cgi?id=12200 Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-21e1000e: check return code from NVM accesses and fix bank detectionBruce Allan
Check return code for all NVM accesses[1] and error out accordingly; log a debug message for failed accesses. For ICH8/9, the valid NVM bank detect function was not checking whether the SEC1VAL (sector 1 valid) bit in the EECD register was itself valid (bits 8 and 9 also have to be set). If invalid, it would have defaulted to the possibly invalid bank 0. Instead, try to use the valid bank detection method used by ICH10 which has been cleaned up a bit. [1] - reads and updates only; not writes because those are only writing to the Shadow RAM, the update following the write is the only thing actually writing the modified Shadow RAM contents to the NVM. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-21e1000e: cosmetic newline in debug messageBruce Allan
Add missing newline from debug message. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-21e1000e: sync change flow control variables with ixgbeBruce Allan
Sync flow control variables and usage model with that found in the ixgbe driver. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-21e1000e: update comments listing supported parts for each MAC familyBruce Allan
Some branding strings (displayed via lspci) are missing from the comments in various family-specific files in the driver. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08Merge branch 'master' of ↵David S. Miller
master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6 Conflicts: drivers/net/e1000e/ich8lan.c drivers/net/e1000e/netdev.c
2008-10-03e1000e: Fix incorrect debug warningLinus Torvalds
Doing 'WARN_ON(preempt_count())' was horribly horribly wrong, and would cause tons of warnings at bootup if PREEMPT was enabled because the initcalls currently run with the kernel lock, which increments the preempt count. At the same time, the warning was also insufficient, since it didn't check that interrupts were enabled. The proper debug function to use for something that can sleep and wants a warning if it's called in the wrong context is 'might_sleep()'. Reported-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-10-02e1000e: debug contention on NVM SWFLAGThomas Gleixner
This patch adds a mutex to the e1000e driver that would help catch any collisions of two e1000e threads accessing hardware at the same time. description and patch updated by Jesse Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-10-02e1000e: reset swflag after resetting hardwareJesse Brandeburg
in the process of debugging things, noticed that the swflag is not reset by the driver after reset, and the swflag is probably not reset unless management firmware clears it after 100ms. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-10-01e1000e: write protect ICHx NVM to prevent malicious write/eraseBruce Allan
Set the hardware to ignore all write/erase cycles to the GbE region in the ICHx NVM. This feature can be disabled by the WriteProtectNVM module parameter (enabled by default) only after a hardware reset, but the machine must be power cycled before trying to enable writes. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> CC: arjan@linux.intel.com Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-09-24e1000e: remove failed request for sw/fw/hw flagBruce Allan
When the driver fails to acquire the control flag used to serialize NVM and PHY accesses between the driver, firmware and hardware, remove the request for the flag otherwise the hardware might grant the flag when it becomes available but the driver will not release the flag. This could cause the firmware to prevent the driver getting the flag for all future attempts. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-09-03e1000e: add support for new 82574L partBruce Allan
This new part has the same feature set as previous parts with the addition of MSI-X support. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-09-03e1000e: add support for 82567LM-3 and 82567LF-3 (ICH10D) partsBruce Allan
Add support for new LOM devices on the latest generation ICHx platforms. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-09-03e1000e: add support for the 82567LM-4 deviceBruce Allan
Enable PCI device ID for a new combination of MAC and PHY already supported in the driver. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-05-06e1000e: Add support for BM PHYs on ICH9Bruce Allan
This patch adds support for the BM PHY, a new PHY model being used on ICH9-based implementations. This new PHY exposes issues in the ICH9 silicon when receiving jumbo frames large enough to use more than a certain part of the Rx FIFO, and this unfortunately breaks packet split jumbo receives. For this reason we re-introduce (for affected adapters only) the jumbo single-skb receive routine back so that people who do wish to use jumbo frames on these ich9 platforms can do so. Part of this problem has to do with CPU sleep states and to make sure that all the wake up timings are correctly we force them with the recently merged pm_qos infrastructure written by Mark Gross. (See http://lkml.org/lkml/2007/10/4/400). To make code read a bit easier we introduce a _IS_ICH flag so that we don't need to do mac type checks over the code. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-04-16e1000e: rename a few functionsJeff Kirsher
Several minor cosmetic function renames. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-04-16e1000e: Make arrays out of these Rx/Tx registersJeff Kirsher
With multiple queues coming into the code these base control registers need to be made into arrays. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-03-28e1000e: reorganize PHY and flow control interfaceJeff Kirsher
This reorganization moves the PHY status into a separate struct. Flow Control setup is moved into this struct as well and frame size away from here into the adapter struct where its inly use is. The post-link-up code is now a separate function and moved out of the watchdog function itself. This allows us to track the es2lan restart issue a bit easier. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-28e1000e: rename mc_addr_list_updateJeff Kirsher
Rename this function to be consistent with function naming (verb first) Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-28e1000e: reformat comment blocks, cosmetic changes onlyBruce Allan
Adjusting the comment blocks here to be code-style compliant. no code changes. Changed some copyright dates to 2008. Indentation fixes. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>