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path: root/drivers/sh/intc.c
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2009-12-09sh: intc: Fixup compile breakage.Paul Mundt
The resume from hibernation patch introduced build failure, fix it up.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-09sh: intc: Fixed resume from hibernationFrancesco VIRLINZI
This patch fixes the resume from hibernation in the intc sysdev device when it manages 'redirect' irq Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-02sh: intc: Handle legacy IRQ reservation in vector map.Paul Mundt
Different CPUs will have different starting vectors, with varying amounts of reserved or unusable vector space prior to the first slot. This introduces a legacy vector reservation system that inserts itself in between the CPU vector map registration and the platform specific IRQ setup. This works fine in practice as the only new vectors that boards need to establish on their own should be dynamically allocated rather than arbitrarily assigned. As a plus, this also makes all of the converted platforms sparseirq ready. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-02sh: intc: dynamic IRQ support.Paul Mundt
This adds support for dynamic IRQ allocation/deallocation for all parts using the SH-style vectored IRQs. While this is not inherently INTC-specific, the INTC code is the main tie-in for vectored IRQ registration, and is the only place that a full view of the utilized vector map is possible. The implementation is fairly straightforward, implementing a flat IRQ map where each registered vector is reserved, allowing us to scan for holes and dynamically wire up IRQs lazily later on in the boot stage. This piggybacks on top of sparseirq in order to make the best use of the available vector space. Dynamic IRQs can be used for any number of things, ranging from MSI in the SH-X3 PCIe case down to demux vectors for board FPGAs and system controllers that presently allocate an arbitrary range. In the latter case, this also allows those platforms to use sparseirq without blowing up, which brings us one step closer to enabling sparseirq as the default for all platform and CPU combinations. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-10-27sh: intc: Make ack_regs generally available.Paul Mundt
Currently this is ifdef'ed under SH-3 and SH-4A, but there are other CPUs that will need this as well. Given the size of the existing data structures, this doesn't cause any additional cacheline utilization for the existing users, so has no direct impact on the data structures. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-08-31sh: Fix up simplified multi-evt handling under sparseirq.Paul Mundt
This fixes up the simplified multi-evt handling when sparseirq support is enabled. While vectors are redirected through the single unique masking source, each one of the redirected vectors still requires its own backing irq_desc, which needs to be manually allocated in the sparseirq case. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-08-24sh: Simplify "multi-evt" interrupt handling.Pawel Moll
This patch changes the way in which "multi-evt" interrups are handled. The intc_evt2irq_table and related intc_evt2irq() have been removed and the "redirecting" handler is installed for the coupled interrupts. Thanks to that the do_IRQ() function don't have to use another level of indirection for all the interrupts... Signed-off-by: Pawel Moll <pawel.moll@st.com> Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-08-24sh: Fixes some write posting issues in the interrupt handling for SHStuart Menefy
It is possible for the CPU to re-enable it's interrupt block bit before the write to the interrupt controller has actually masked out the external interupt at the controller. We get around this by reading back from the interrupt controller which will ensure the write has happened. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-06-12sh: intc: alloc_bootmem() -> kzalloc() conversion.Paul Mundt
Now that the slab allocators are available much earlier, this triggers a the slab_is_available() warning when registering the interrupt controller. Convert to kzalloc() with GFP_NOWAIT, as per the generic changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-06-11sh: Tie sparseirq in to Kconfig.Paul Mundt
Now that the dependent patches are merged, we are ready to enable sparseirq support. This simply adds the Kconfig option, and then converts from the _cpu to the _node allocation routines to follow the upstream sparseirq API changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-05-22sh: Wrap irq_to_desc_alloc_cpu() around CONFIG_SPARSE_IRQ temporarily.Paul Mundt
irq_to_desc_alloc_cpu() has been renamed to irq_to_desc_alloc_node() in -next, but as we can not presently enable SPARSE_IRQ without the early irq_desc alloc patch, protect it with an ifdef until the interface has settled and we are ready to enable it system-wide. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-05-22sh: irq: Teach ipr and intc about dynamically allocating irq_descs.Paul Mundt
This hooks in irq_to_desc_alloc_cpu() to the necessary code paths in the intc and ipr controller registration paths. As these are the primary call paths for all SH CPUs, this alone will make all CPUs sparse IRQ ready. There is the added benefit now that each CPU contains specific IPR and INTC tables, so only the vectors with interrupt sources backing them will ever see an irq_desc instantiation. This effectively packs irq_desc down to match the CPU, rather than padding NR_IRQS out to cover the valid vector range. Boards with extra sources will still have to fiddle with the nr_irqs setting, but they can continue doing so through the machvec as before. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-06sh: intc: Added resume from hibernation support to the intcFrancesco VIRLINZI
It's required for all modules loaded in the previous runtime session because not initilized duing the kernel start-up. Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-02sh: intc: set_irq_wake() supportMagnus Damm
Add set_irq_wake() support to intc using sysdev and suspend. The intc controllers are put on a list at registration time and registered as sysdev devices later on during the boot. The sysdev class suspend callback is used to find irqs with wakeup enabled belonging to our intc controller. Such irqs are simply enabled so wakeup interrupts may reach the cpu. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-02sh: intc: install enable, disable and shutdown callbacksMagnus Damm
Modify the intc code to install a disable callback. The current solution without a disable callback results in use of the generic default_disable() function. This function is a no-op so suspend_device_irqs() will not disable any intc interrupts at suspend time without this patch. Also, install enable and shutdown callbacks while at it. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: intc: Make missing unique IRQ mask warning more verbose.Paul Mundt
This includes the IRQ number in addition to the vector, as not all platforms wrap in with INTC_VECT(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: multiple vectors per irq - baseMagnus Damm
Instead of keeping the single vector -> single linux irq mapping we extend the intc code to support merging of vectors to a single linux irq. This helps processors such as sh7750, sh7780 and sh7785 which have more vectors than masking ability. With this patch in place we can modify the intc tables to use one irq per maskable irq source. Please note the following: - If multiple vectors share the same enum then only the first vector will be available as a linux irq. - Drivers may need to be rewritten to get pending irq source from the hardware block instead of irq number. This patch together with the sh7785 specific intc tables solves DMA controller irq issues related to buggy interrupt masking. Reported-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-10-01sh: Move the shared INTC code out to drivers/sh/Paul Mundt
The INTC code will be re-used across different architectures, so move this out to drivers/sh/ and include/linux/sh_intc.h respectively. Signed-off-by: Paul Mundt <lethal@linux-sh.org>