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path: root/include/asm-powerpc/io.h
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2008-06-30powerpc: Fix copy-and-paste error in clrsetbits_le16Scott Wood
This was pointed out by Detlev Zundel when this code was being added to U-boot. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-06-09powerpc: Improve (in|out)_[bl]eXX() asm codeTrent Piepho
Since commit 4cb3cee03d558fd457cb58f56c80a2a09a66110c the code generated for the in_beXX() and out_beXX() mmio functions has been sub-optimal. The out_leXX() family of functions are created with the macro DEF_MMIO_OUT_LE() while the out_beXX() family are created with DEF_MMIO_OUT_BE(). In what was perhaps a bit too much macro use, both of these macros are in turn created via the macro DEF_MMIO_OUT(). For the LE versions, eventually they boil down to an asm that will look something like this: asm("sync; stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); The issue is that the "stwbrx" instruction only comes in an indexed, or 'x', version, in which the address is represented by the sum of two registers (the "0,%2"). Unfortunately, gcc doesn't have a constraint for an indexed memory reference. The "m" constraint allows both indexed and offset, i.e. register plus constant, memory references and there is no "stwbr" version for offset references. "m" also allows updating addresses and there is no 'u' version of "stwbrx" like there is with "stwux". The unused first operand to the asm is just to tell gcc that *addr is an output of the asm. The address used is passed in a single register via the third asm operand, and the index register is just hard coded as 0. This means gcc is forced to put the address in a single register and can't use index addressing, e.g. if one has the data in register 9, a base address in register 3 and an index in register 4, gcc must emit code like "add 11,4,3; stwbrx 9,0,11" instead of just "stwbrx 9,4,3". This costs an extra add instruction and another register. For gcc 4.0 and older, there doesn't appear to be anything that can be done. But for 4.1 and newer, there is a 'Z' constraint. It does not allow "updating" addresses, but does allow both indexed and offset addresses. However, the only allowed constant offset is 0. We can then use the undocumented 'y' operand modifier, which causes gcc to convert "0(reg)" into the equivilient "0,reg" format that can be used with stwbrx. This brings us the to problem with the BE version. In this case, the "stw" instruction does have both indexed and non-indexed versions. The final asm ends up looking like this: asm("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val), "r" (addr)); The undocumented codes "%U0" and "%0X" will generate a 'u' if the memory reference should be an auto-updating one, and an 'x' if the memory reference is indexed, respectively. The third operand is unused, it's just there because asm the code is reused from the LE version. However, gcc does not know this, and generates unnecessary code to stick addr in a register! To use the example from the LE version, gcc will generate "add 11,4,3; stwx 9,4,3". It is able to use the indexed address "4,3" for the "stwx", but still thinks it needs to put 4+3 into register 11, which will never be used. This also ends up happening a lot for the offset addressing mode, where common code like this: out_be32(&device_registers->some_register, data); uses an instruction like "stw 9, 42(3)", where register 3 has the pointer device_registers and 42 is the offset of some_register in that structure. gcc will be forced to generate the unnecessary instruction "addi 11, 3, 42" to put the address into a single (unused) register. The in_* versions end up having these exact same problems as well. Signed-off-by: Trent Piepho <tpiepho@freescale.com> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: Andreas Schwab <schwab@suse.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-05-31[POWERPC] Add "memory" clobber to MMIO accessorsBenjamin Herrenschmidt
Gcc might re-order MMIO accessors vs. surrounding consistent memory accesses, which is a "bad thing", and could break drivers. This fixes it by adding a "memory" clobber to the MMIO accessors, which should prevent gcc from doing that reordering. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-05-05[POWERPC] devres: Add devm_ioremap_prot()Emil Medve
We provide an ioremap_flags, so this provides a corresponding devm_ioremap_prot. The slight name difference is at Ben Herrenschmidt's request as he plans on changing ioremap_flags to ioremap_prot in the future. Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Tejun Heo <htejun@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-04-24[POWERPC] cell: Generalize io-workarounds codeIshizaki Kou
This splits cell io-workaround code into spider-pci dependent code and a generic part, and also moves io-workarounds initialization into cell_setup_phb. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-11[POWERPC] Make isa_mem_base common to 32 and 64 bitsBenjamin Herrenschmidt
This defines isa_mem_base on both 32 and 64 bits (it used to be 32 bits only). This avoids a few ifdef's in later patches and potentially can allow support for VGA text mode on 64 bits powerpc. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-19Spelling fix: explicitlyJean Delvare
From: Jean Delvare <khali@linux-fr.org> Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Adrian Bunk <bunk@kernel.org>
2007-10-17Remove dma_cache_(wback|inv|wback_inv) functionsRalf Baechle
dma_cache_(wback|inv|wback_inv) were the earliest attempt on a generalized cache managment API for I/O purposes. Originally it was basically the raw MIPS low level cache API exported to the entire world. The API has suffered from a lack of documentation, was not very widely used unlike it's more modern brothers and can easily be replaced by dma_cache_sync. So remove it rsp. turn the surviving bits back into an arch private API, as discussed on linux-arch. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Paul Mackerras <paulus@samba.org> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Kyle McMartin <kyle@parisc-linux.org> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-14endian-clean in_le64/out_le64Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-03[POWERPC] ppc64: support CONFIG_DEBUG_PREEMPTHugh Dickins
Add CONFIG_DEBUG_PREEMPT support to ppc64: it was useful for testing get_paca() preemption. Cheat a little, just use debug_smp_processor_id() in the debug version of get_paca(): it contains all the right checks and reporting, though get_paca() doesn't really use smp_processor_id(). Use local_paca for what might have been called __raw_get_paca(). Silence harmless warnings from io.h and lparcfg.c with local_paca - it is okay for iseries_lparcfg_data to be referencing shared_proc with preemption enabled: all cpus should show the same value for shared_proc. Why do other architectures need TRACE_IRQFLAGS_SUPPORT for DEBUG_PREEMPT? I don't know, ppc64 appears to get along fine without it. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-14[POWERPC] add clrsetbits macrosTimur Tabi
This patch adds the clrsetbits_xxx() macros, which are used to set and clear multiple bits in a single read-modify-write operation. Specify the bits to clear in the 'clear' parameter and the bits to set in the 'set' parameter. These macros can also be used to set a multiple-bit bit pattern using a mask, by specifying the mask in the 'clear' parameter and the new bit pattern in the 'set' parameter. There are big-endian and little-endian versions for 8, 16, 32, and 64 bits. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-22[POWERPC] Add clrbits8 and setbits8Scott Wood
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-14[POWERPC] Abolish iopa(), mm_ptov(), io_block_mapping() from arch/powerpcDavid Gibson
These old-fashioned IO mapping functions no longer have any callers in code which remains relevant on arch/powerpc. Therefore, this removes them from arch/powerpc. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-14[POWERPC] Rewrite IO allocation & mapping on powerpc64Benjamin Herrenschmidt
This rewrites pretty much from scratch the handling of MMIO and PIO space allocations on powerpc64. The main goals are: - Get rid of imalloc and use more common code where possible - Simplify the current mess so that PIO space is allocated and mapped in a single place for PCI bridges - Handle allocation constraints of PIO for all bridges including hot plugged ones within the 2GB space reserved for IO ports, so that devices on hotplugged busses will now work with drivers that assume IO ports fit in an int. - Cleanup and separate tracking of the ISA space in the reserved low 64K of IO space. No ISA -> Nothing mapped there. I booted a cell blade with IDE on PIO and MMIO and a dual G5 so far, that's it :-) With this patch, all allocations are done using the code in mm/vmalloc.c, though we use the low level __get_vm_area with explicit start/stop constraints in order to manage separate areas for vmalloc/vmap, ioremap, and PCI IOs. This greatly simplifies a lot of things, as you can see in the diffstat of that patch :-) A new pair of functions pcibios_map/unmap_io_space() now replace all of the previous code that used to manipulate PCI IOs space. The allocation is done at mapping time, which is now called from scan_phb's, just before the devices are probed (instead of after, which is by itself a bug fix). The only other caller is the PCI hotplug code for hot adding PCI-PCI bridges (slots). imalloc is gone, as is the "sub-allocation" thing, but I do beleive that hotplug should still work in the sense that the space allocation is always done by the PHB, but if you unmap a child bus of this PHB (which seems to be possible), then the code should properly tear down all the HPTE mappings for that area of the PHB allocated IO space. I now always reserve the first 64K of IO space for the bridge with the ISA bus on it. I have moved the code for tracking ISA in a separate file which should also make it smarter if we ever are capable of hot unplugging or re-plugging an ISA bridge. This should have a side effect on platforms like powermac where VGA IOs will no longer work. This is done on purpose though as they would have worked semi-randomly before. The idea at this point is to isolate drivers that might need to access those and fix them by providing a proper function to obtain an offset to the legacy IOs of a given bus. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-04-27[POWERPC] Generic check_legacy_ioportOlaf Hering
check_legacy_ioport makes only sense on PREP, CHRP and pSeries. They may have an isa node with PS/2, parport, floppy and serial ports. Remove the check_legacy_ioport call from ppc_md, it's not needed anymore. Hardware capabilities come from the device-tree. Signed-off-by: Olaf Hering <olaf@aepfle.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-07[POWERPC] Fix kernel build errors for mpc8272ads and mpc8560adsVitaly Bordug
Recent update of asm-powerpc/io.h caused cpm-related stuff to break in the current kernel. Current patch fixes it, as well as other inconsistencies expressed, that do not permit targets from working properly: - Updated dts with a chosen node with interrupt controller, - fixed messed device IDs among CPM2 SoC devices, - corrected odd header name and fixed type in defines, - Added 82xx subdir to the powerpc/platforms Makefile, missed during initial commit, - new solely-powerpc header file for 8260 family (was using one from arch/ppc, this one cleaned up from the extra stuff), in fact for now a placeholder to get the board-specific includes for stuff not yet capable to live with devicetree peeks only - Fixed couple of misprints in reference mpc8272 dts. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] include/asm-powerpc/: "extern inline" -> "static inline"Adrian Bunk
"extern inline" generates a warning with -Wmissing-prototypes and I'm currently working on getting the kernel cleaned up for adding this to the CFLAGS since it will help us to avoid a nasty class of runtime errors. If there are places that really need a forced inline, __always_inline would be the correct solution. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Fix __raw* accessorsBenjamin Herrenschmidt
The new IO accessor code allows to stick a token in the top bit of MMIO addresses which gets masked out during actual accesses. However, the __raw_* accessors forgot to mask it out. This fixes it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Merge 32 and 64 bits asm-powerpc/io.hBenjamin Herrenschmidt
powerpc: Merge 32 and 64 bits asm-powerpc/io.h The rework on io.h done for the new hookable accessors made it easier, so I just finished the work and merged 32 and 64 bits io.h for arch/powerpc. arch/ppc still uses the old version in asm-ppc, there is just too much gunk in there that I really can't be bothered trying to cleanup. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bitsBenjamin Herrenschmidt
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO and PIO) and provides a generic way for other platforms to do so (we have need to do that for various other platforms). While reworking the IO ops, I ended up doing some spring cleaning in io.h and eeh.h which I might want to split into 2 or 3 patches (among others, eeh.h had a lot of useless stuff in it). A side effect is that EEH for PIO should work now (it used to pass IO ports down to the eeh address check functions which is bogus). Also, new are MMIO "repeat" ops, which other archs like ARM already had, and that we have too now: readsb, readsw, readsl, writesb, writesw, writesl. In the long run, I might also make EEH use the hooks instead of wrapping at the toplevel, which would make things even cleaner and relegate EEH completely in platforms/iseries, but we have to measure the performance impact there (though it's really only on MMIO reads) Since I also need to hook on ioremap, I shuffled the functions a bit there. I introduced ioremap_flags() to use by drivers who want to pass explicit flags to ioremap (and it can be hooked). The old __ioremap() is still there as a low level and cannot be hooked, thus drivers who use it should migrate unless they know they want the low level version. The patch "arch provides generic iomap missing accessors" (should be number 4 in this series) is a pre-requisite to provide full iomap API support with this patch. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-01[POWERPC] Make mmiowb's io_sync preempt safeHugh Dickins
If mmiowb() is always used prior to releasing spinlock as Doc suggests, then it's safe against preemption; but I'm not convinced that's always the case. If preemption occurs between sync and get_paca()->io_sync = 0, I believe there's no problem. But in the unlikely event that gcc does the store relative to another register than r13 (as it did with current), then there's a small danger of setting another cpu's io_sync to 0, after it had just set it to 1. Rewrite ppc64 mmiowb to prevent that. The remaining io_sync assignments in io.h all get_paca()->io_sync = 1, which is harmless even if preempted to the wrong cpu (the context switch itself syncs); and those in spinlock.h are while preemption is disabled. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-11[PATCH] Consolidate check_signatureMatthew Wilcox
There's nothing arch-specific about check_signature(), so move it to <linux/io.h>. Use a cross between the Alpha and i386 implementations as the generic one. Signed-off-by: Matthew Wilcox <willy@parisc-linux.org> Acked-by: Alan Cox <alan@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-03[PATCH] restore parport_pc probing on powermacOlaf Hering
The last change for partport_pc did fix the common case for all PowerMacs, but it broke the case for PCI multiport IO cards. In fact, the config option CONFIG_PARPORT_PC_SUPERIO=y lead to a hard crash when cups probed the parport driver. It enables the winbond and smsc probing. Remove the PARPORT_BASE check again, parport_pc_find_nonpci_ports() will take care of it. All powerpc configs should have CONFIG_PARPORT_PC_SUPERIO=n, the code did not find anything on the chrp boards we tested it on. Tested on a G4/466 with a PCI card: 0001:10:13.0 Serial controller: Timedia Technology Co Ltd PCI2S550 (Dual 16550 UART) (rev 01) (prog-if 02 [16550]) Subsystem: Timedia Technology Co Ltd Unknown device 5079 Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 53 Region 0: I/O ports at f2000800 [size=32] Region 2: I/O ports at f2000870 [size=8] Region 3: I/O ports at f2000860 [size=8] Signed-off-by: Olaf Hering <olaf@aepfle.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Adam Belay <ambx1@neo.rr.com> Cc: Dmitry Torokhov <dtor@mail.ru> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-01[PATCH] update legacy io handling for pmacOlaf Hering
ppc can boot one single binary on prep, chrp and pmac boards. ppc64 can boot one single binary on pseries and G5 boards. pmac has no legacy io, probing for PC style legacy hardware (or accessing the legacy io area regulary) may lead to a hard crash: * add check for parport_pc, exit on pmac. 32bit chrp has no ->check_legacy_ioport, the probe is always called. 64bit chrp has check_legacy_ioport, check for a "parallel" node * add check for isapnp, only PReP boards may have real ISA slots. 32bit PReP will have no ->check_legacy_ioport, the probe is always called. * update code in i8042_platform_init. Run ->check_legacy_ioport first, always call request_region. No functional change. Remove whitespace before i8042_reset init. Signed-off-by: Olaf Hering <olaf@aepfle.de> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Adam Belay <ambx1@neo.rr.com> Cc: Dmitry Torokhov <dtor@mail.ru> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-22[POWERPC] Merge iSeries i/o operations with the restStephen Rothwell
This patch changes the io operations so that they are out of line if CONFIG_PPC_ISERIES is set and includes a firmware feature check in that case. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-09-20[POWERPC] iseries: eliminate a couple of warningsStephen Rothwell
Copy and paste bug in io.h Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2006-09-20[POWERPC] convert string i/o operations to CStephen Rothwell
This produces essentially the same code and will make the iSeries i/o consolidation easier. The count parameter is changed to long since that will produce the same (better) code on 32 and 64 bit builds. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2006-09-20[POWERPC] clean up ide io accessorsStephen Rothwell
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2006-09-20[POWERPC] remove unused asm routinesStephen Rothwell
_insw, _outsw, _insl amd _outsl are all unused, so remove them. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2006-09-20[POWERPC] remove unused io accessorsStephen Rothwell
The io accessors insw_ns, outsw_ns, insl_ns and outsl_ns are unused (except for one unnecessary use in drivers/net/3c509.c that is addressed in a previous patch) and are only defined in powerpc/ppc, so remove them. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2006-09-13[POWERPC] Fix MMIO ops to provide expected barrier behaviourPaul Mackerras
This changes the writeX family of functions to have a sync instruction before the MMIO store rather than after, because the generally expected behaviour is that the device receiving the MMIO store can be guaranteed to see the effects of any preceding writes to normal memory. To preserve ordering between writeX and readX, and to preserve ordering between preceding stores and the readX, the readX family of functions have had an sync added before the load. Although writeX followed by spin_unlock is not officially guaranteed to keep the writeX inside the spin-locked region unless an mmiowb() is used, there are currently drivers that depend on the previous behaviour on powerpc, which was that the mmiowb wasn't actually required. Therefore we have a per-cpu flag that is set by writeX, cleared by __raw_spin_lock and mmiowb, and tested by __raw_spin_unlock. If it is set, __raw_spin_unlock does a sync and clears it. This changes both 32-bit and 64-bit readX/writeX. 32-bit already has a sync in __raw_spin_unlock (since lwsync doesn't exist on 32-bit), and thus doesn't need the per-cpu flag. Tested on G5 (PPC970) and POWER5. Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-08-30[POWERPC] iseries: Define insw et al. so libata/ide will compileStephen Rothwell
These are build fixes that enable (for example) libata and the ide code to actually build on iSeries. The associated hardware will never be supported on legacy iSeries, so the code paths don't actually need to work, but it is useful (especially for a combined kernel) if the code can build. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-04-29Merge branch 'merge'Paul Mackerras
2006-04-28[PATCH] powerpc: Use check_legacy_ioport() on ppc32 too.David Woodhouse
Some people report that we die on some Macs when we are expecting to catch machine checks after poking at some random I/O address. I'd seen it happen on my dual G4 with serial ports until we fixed those to use OF, but now other users are reporting it with i8042. This expands the use of check_legacy_ioport() to avoid that situation even on 32-bit kernels. Signed-off-by: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-04-22[PATCH] powerpc: remove io_page_maskAnton Blanchard
Cleanup patch which removes the io_page_mask. It fixes the reset on some e1000 devices which is needed for clean kexec reboots. The legacy devices which broke with this patch (parallel port and PC speaker) have now been fixed in Linus' tree. Signed-off-by: Anton Blanchard <anton@samba.org> Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-09[PATCH] powerpc: sanitize header files for user space includesArnd Bergmann
include/asm-ppc/ had #ifdef __KERNEL__ in all header files that are not meant for use by user space, include/asm-powerpc does not have this yet. This patch gets us a lot closer there. There are a few cases where I was not sure, so I left them out. I have verified that no CONFIG_* symbols are used outside of __KERNEL__ any more and that there are no obvious compile errors when including any of the headers in user space libraries. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-19powerpc: Trivially merge several headers from asm-ppc64 to asm-powerpcPaul Mackerras
For these, I have just done the lame-o merge where the file ends up looking like: #ifndef CONFIG_PPC64 #include <asm-ppc/foo.h> #else ... contents from asm-ppc64/foo.h #endif so nothing has changed, really, except that we reduce include/asm-ppc64 a bit more. Signed-off-by: Paul Mackerras <paulus@samba.org>