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2008-01-26Merge branch 'for-2.6.25' of ↵Paul Mackerras
master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx
2008-01-25[POWERPC] Enable RTC for Ebony and Walnut (v2)David Gibson
This patch extends the Ebony and Walnut platform code to instantiate the existing ds1742 RTC class driver for the DS1743 RTC/NVRAM chip found on both those boards. The patch uses a helper function to scan the device tree and instantiate the appropriate platform_device based on it, so it should be easy to extend for other boards which have mmio mapped RTC chips. Along with this, the device tree binding for the ds1743 chips is tweaked, based on the existing DS1385 OF binding found at: http://playground.sun.com/1275/proposals/Closed/Remanded/Accepted/346-it.txt Although that document covers the NVRAM portion of the chip, whereas here we're interested in the RTC portion, so it's not entirely clear if that's a good model. This implements only RTC class driver support - that is /dev/rtc0, not /dev/rtc, and the low-level get/set time callbacks remain unimplemented. That means in order to get at the clock you will either need a modified version of hwclock which will look at /dev/rtc0, or you'll need to configure udev to symlink rtc0 to rtc. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-01-25[POWERPC] Remove the global dma_direct_offsetMichael Ellerman
We no longer need the global dma_direct_offset, update the comment to reflect the new reality. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-25[POWERPC] PS3: Remove lpar address workaroundGeoff Levand
Remove the PS3 workaround needed to support sparsemem SPU mappings. The SPU mappings no longer use sparsemem, so this workaround is no longer needed. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-25[POWERPC] PS3: Add logical performance monitor driver supportTakashi Yamamoto
Add PS3 logical performance monitor (lpm) device driver. The PS3's LV1 hypervisor provides a Logical Performance Monitor that abstracts the Cell processor's performance monitor features for use by guest operating systems. Signed-off-by: Takashi Yamamoto <TakashiA.Yamamoto@jp.sony.com> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-25[POWERPC] PS3: Add logical performance monitor device supportGeoff Levand
Add PS3 logical performance monitor device support to the PS3 system-bus and platform device registration routines. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-25[POWERPC] PS3: Make bus_id and dev_id u64Geert Uytterhoeven
Change the PS3 bus_id and dev_id from type unsigned int to u64. These IDs are 64-bit in the repository, and the special storage notification device has a device ID of ULONG_MAX. Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-25[POWERPC] Add definition of Cell bookmark SPRGeoff Levand
Add a definition for the Cell bookmark SPR to asm-powerpc/regs.h. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-25[POWERPC] kdump shutdown hook supportMichael Neuling
This adds hooks into the default_machine_crash_shutdown so drivers can register a function to be run in the first kernel before we hand off to the second kernel. This should only be used in exceptional circumstances, like where the device can't be reset in the second kernel alone (as is the case with eHEA). To emphasize this, the number of handles allowed to be registered is currently #def to 1. This uses the setjmp/longjmp code around the call out to the registered hooks, so any bogus exceptions we encounter will hopefully be recoverable. Tested with bogus data and instruction exceptions. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-25[POWERPC] Make setjmp/longjmp code usable outside of xmonMichael Neuling
This makes the setjmp/longjmp code used by xmon, generically available to other code. It also removes the requirement for debugger hooks to be only called on 0x300 (data storage) exception. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-24Merge branch 'for-2.6.25' of ↵Paul Mackerras
master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into for-2.6.25
2008-01-23[POWERPC] Add _nmask_and_or_msr() declartion to asm-powerpc/system.hJon Loeliger
Prevents miscellaneous users from declaring it locally. Signed-off-by: Jon Loeliger <jdl@freecale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-23[POWERPC] 82xx: Embedded Planet EP8248E supportScott Wood
This board is also resold by Freescale under the names "QUICCStart MPC8248 Evaluation System" and "CWH-PPC-8248N-VE". Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-23[POWERPC] QE: Add ability to upload QE firmwareTimur Tabi
Define the layout of a binary blob that contains a QE firmware and instructions on how to upload it. Add function qe_upload_firmware() to parse the blob and perform the actual upload. Fully define 'struct rsp' in immap_qe.h to include the actual RISC Special Registers. Added description of a new QE firmware node to booting-without-of.txt. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-23[POWERPC] Remove update_bridge_resourceKumar Gala
The 85xx/86xx pci code no longer uses update_bridge_resource and it was the only caller. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-23[POWERPC] Fix handling of memreserve if the range lands in highmemKumar Gala
There were several issues if a memreserve range existed and happened to be in highmem: * The bootmem allocator is only aware of lowmem so calling reserve_bootmem with a highmem address would cause a BUG_ON * All highmem pages were provided to the buddy allocator Added a lmb_is_reserved() api that we now use to determine if a highem page should continue to be PageReserved or provided to the buddy allocator. Also, we incorrectly reported the amount of pages reserved since all highmem pages are initally marked reserved and we clear the PageReserved flag as we "free" up the highmem pages. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-24Merge branch 'linux-2.6'Paul Mackerras
2008-01-24[POWERPC] Provide a way to protect 4k subpages when using 64k pagesPaul Mackerras
Using 64k pages on 64-bit PowerPC systems makes life difficult for emulators that are trying to emulate an ISA, such as x86, which use a smaller page size, since the emulator can no longer use the MMU and the normal system calls for controlling page protections. Of course, the emulator can emulate the MMU by checking and possibly remapping the address for each memory access in software, but that is pretty slow. This provides a facility for such programs to control the access permissions on individual 4k sub-pages of 64k pages. The idea is that the emulator supplies an array of protection masks to apply to a specified range of virtual addresses. These masks are applied at the level where hardware PTEs are inserted into the hardware page table based on the Linux PTEs, so the Linux PTEs are not affected. Note that this new mechanism does not allow any access that would otherwise be prohibited; it can only prohibit accesses that would otherwise be allowed. This new facility is only available on 64-bit PowerPC and only when the kernel is configured for 64k pages. The masks are supplied using a new subpage_prot system call, which takes a starting virtual address and length, and a pointer to an array of protection masks in memory. The array has a 32-bit word per 64k page to be protected; each 32-bit word consists of 16 2-bit fields, for which 0 allows any access (that is otherwise allowed), 1 prevents write accesses, and 2 or 3 prevent any access. Implicit in this is that the regions of the address space that are protected are switched to use 4k hardware pages rather than 64k hardware pages (on machines with hardware 64k page support). In fact the whole process is switched to use 4k hardware pages when the subpage_prot system call is used, but this could be improved in future to switch only the affected segments. The subpage protection bits are stored in a 3 level tree akin to the page table tree. The top level of this tree is stored in a structure that is appended to the top level of the page table tree, i.e., the pgd array. Since it will often only be 32-bit addresses (below 4GB) that are protected, the pointers to the first four bottom level pages are also stored in this structure (each bottom level page contains the protection bits for 1GB of address space), so the protection bits for addresses below 4GB can be accessed with one fewer loads than those for higher addresses. Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-21[POWERPC] Separate MPC52xx PSC FIFO registers from rest of PSCJohn Rigby
This is in preparation for the addition of MPC512x PSC support. The main difference in the 512x is in the fifo registers. Signed-off-by: John Rigby <jrigby@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-01-18[POWERPC] mpc5200: eliminate mpc52xx_*_map_*() functions.Grant Likely
mpc5200 platform code defines a bunch of map functions which duplicate the functionality of of_iomap(). Remove them and use of_iomap() instead. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-01-18[POWERPC] mpc5200: Add common mpc52xx_setup_pci() routineMarian Balakowicz
This patch moves a generic pci init code from lite5200 platform file to a common mpc52xx_setup_pci() routine and adds additional compatibility property verification. Signed-off-by: Marian Balakowicz <m8@semihalf.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-01-17[POWERPC] Add hugepagesz boot-time parameterJon Tollefson
This adds the hugepagesz boot-time parameter for ppc64. It lets one pick the size for huge pages. The choices available are 64K and 16M when the base page size is 4k. It defaults to 16M (previously the only only choice) if nothing or an invalid choice is specified. Tested 64K huge pages successfully with the libhugetlbfs 1.2. Signed-off-by: Jon Tollefson <kniht@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-17[POWERPC] iSeries: eliminate pci_dn bussubnoStephen Rothwell
xlate_iomm_address() really wants the ds_addr to pass to the HV, so store that value (instead of the BAR number) when we allocate the device bars. This is not a fast path, so we can look up the device_node property there instead of using the bussubno field of the pci_dn. The other user of iseries_ds_addr() was already scanning the device tree, so looking up a property will not slow it down any more. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-17[POWERPC] The pci_dn pcidev is only used by EEHStephen Rothwell
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-17[POWERPC] The pci_dn class_code is only used by EEHStephen Rothwell
... so move it into the #ifdef CONFIG_EEH section. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-17[POWERPC] Kill sparse warning in HPTE_V_COMPARE()Geert Uytterhoeven
Fixes sparse warning: constant 0xffffffffffffff80 is so big it is unsigned long Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-15[POWERPC] Fix boot failure on POWER6Paul Mackerras
Commit 473980a99316c0e788bca50996375a2815124ce1 added a call to clear the SLB shadow buffer before registering it. Unfortunately this means that we clear out the entries that slb_initialize has previously set in there. On POWER6, the hypervisor uses the SLB shadow buffer when doing partition switches, and that means that after the next partition switch, each non-boot CPU has no SLB entries to map the kernel text and data, which causes it to crash. This fixes it by reverting most of 473980a9 and instead clearing the 3rd entry explicitly in slb_initialize. This fixes the problem that 473980a9 was trying to solve, but without breaking POWER6. Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-11[POWERPC] Fix CPU hotplug when using the SLB shadow bufferMichael Neuling
Before we register the SLB shadow buffer, we need to invalidate the entries in the buffer, otherwise we can end up stale entries from when we previously offlined the CPU. This does this invalidate as well as unregistering the buffer with PHYP before we offline the cpu. Tested and fixes crashes seen on 970MP (thanks to tonyb) and POWER5. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-31Merge branch 'for-2.6.25' of ↵Paul Mackerras
git://git.kernel.org/pub/scm/linux/kernel/git/olof/pasemi
2007-12-28[POWERPC] pasemi: Distribute interrupts evenly across cpusOlof Johansson
By default the OpenPIC on PWRficient will bias to one core (since that will improve changes of the other core being able to stay idle/powered down). However, this conflicts with most irq load balancing schemes, since setting an interrupt to be delivered to either core doesn't really result in the load being shared. It also doesn't work well with the soft irq disable feature of PPC, since EE will stay on until the first interrupt is taken while soft disabled. Set the gconf0 config bit that enables even distribution of interrupts among the two cores. Signed-off-by: Olof Johansson <olof@lixom.net>
2007-12-28[POWERPC] pasemi: Implement NMI supportOlof Johansson
Some PWRficient-based boards have a NMI button that's wired up to a GPIO as interrupt source. By configuring the openpic accordingly, these get delivered as a machine check with high priority, instead of as an external interrupt. The device tree contains a property "nmi-source" in the openpic node for these systems, and it's the (hwirq) source for the input. Also, for these interrupts, the IACK is read from another register than the regular (MCACK instead), but they are EOI'd as usual. So implement said function for the mpic driver. Finally, move a couple of external function defines to include/ instead of local under sysdev. Being able to mask/unmask and eoi directly saves us from setting up a dummy irq handler that will never be called. Signed-off-by: Olof Johansson <olof@lixom.net>
2007-12-28[POWERPC] Oprofile: Remove dependency on spufs moduleBob Nelson
This removes an OProfile dependency on the spufs module. This dependency was causing a problem for multiplatform systems that are built with support for Oprofile on Cell but try to load the oprofile module on a non-Cell system. Signed-off-by: Bob Nelson <rrnelson@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Acked-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-23[POWERPC] 4xx: Add early udbg support for 40x processorsBenjamin Herrenschmidt
This adds some basic real mode based early udbg support for 40x in order to debug things more easily Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: Improve support for 4xx indirect DCRsBenjamin Herrenschmidt
Accessing indirect DCRs is done via a pair of address/data DCRs. Such accesses are thus inherently racy, vs. interrupts, preemption and possibly SMP if 4xx SMP cores are ever used. This updates the mfdcri/mtdcri macros in dcr-native.h (which were so far unused) to use a spinlock. In addition, add some common definitions to a new dcr-regs.h file. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] Reworking machine check handling and Fix 440/440ABenjamin Herrenschmidt
This adds a cputable function pointer for the CPU-side machine check handling. The semantic is still the same as the old one, the one in ppc_md. overrides the one in cputable, though ultimately we'll want to change that so the CPU gets first. This removes CONFIG_440A which was a problem for multiplatform kernels and instead fixes up the IVOR at runtime from a setup_cpu function. The "A" version of the machine check also tweaks the regs->trap value to differenciate the 2 versions at the C level. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-21Merge branch 'linux-2.6'Paul Mackerras
2007-12-21[POWERPC] Pointers marked as __iomem do not need to be volatileStephen Rothwell
Fixes this warning: arch/powerpc/platforms/powermac/pci.c: In function 'u3_ht_cfg_access': arch/powerpc/platforms/powermac/pci.c:354: warning: return discards qualifiers from pointer target type arch/powerpc/platforms/powermac/pci.c:358: warning: return discards qualifiers from pointer target type Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] Constify the of_device_id passed to of_platform_bus_probeStephen Rothwell
This will allow us to declare const all the statically declared arrrays of these. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] Implement arch disable/enable irq hooks.Scott Wood
These hooks ensure that a decrementer interrupt is not pending when suspending; otherwise, problems may occur on 6xx/7xx/7xxx-based systems (except for powermacs, which use a separate suspend path). For example, with deep sleep on the 831x, a pending decrementer will cause a system freeze because the SoC thinks the decrementer interrupt would have woken the system, but the core must have interrupts disabled due to the setup required for deep sleep. Changed via-pmu.c to use the new ppc_md hooks, and made the arch_* functions call the generic_* functions unconditionally. -- paulus Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: don't set reserved bits in spu interrupt statusMasato Noguchi
This changes the spu context switch code to not write to reserved bits of spu interrupt status register. The architecture book says the reserved fields should be set to zero. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: rework class 0 and 1 interrupt handlingJeremy Kerr
Based on original patches from Arnd Bergmann <arnd.bergman@de.ibm.com>; and Luke Browning <lukebr@linux.vnet.ibm.com> Currently, spu contexts need to be loaded to the SPU in order to take class 0 and class 1 exceptions. This change makes the actual interrupt-handlers much simpler (ie, set the exception information in the context save area), and defers the handling code to the spufs_handle_class[01] functions, called from spufs_run_spu. This should improve the concurrency of the spu scheduling leading to greater SPU utilization when SPUs are overcommited. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: use #defines for SPU class [012] exception statusJeremy Kerr
Add a few #defines for the class 0, 1 and 2 interrupt status bits, and use them instead of magic numbers when we're setting or checking for these interrupts. Also, add a #define for the class 2 mailbox threshold interrupt mask. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: move fault, lscsa_alloc and switch code to spufs moduleJeremy Kerr
Currently, part of the spufs code (switch.o, lscsa_alloc.o and fault.o) is compiled directly into the kernel. This change moves these components of spufs into the kernel. The lscsa and switch objects are fairly straightforward to move in. For the fault.o module, we split the fault-handling code into two parts: a/p/p/c/spu_fault.c and a/p/p/c/spufs/fault.c. The former is for the in-kernel spu_handle_mm_fault function, and we move the rest of the fault-handling code into spufs. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] cell: wrap master run control bitMasato Noguchi
Add platform specific SPU run control routines to the spufs. The current spufs implementation uses the SPU master run control bit (MFC_SR1[S]) to control SPE execution, but the PS3 hypervisor does not support the use of this feature. This change adds the run control wrapper routies spu_enable_spu() and spu_disable_spu(). The bare metal routines use the master run control bit, and the PS3 specific routines use the priv2 run control register. An outstanding enhancement for the PS3 would be to add a guard to check for incorrect access to the spu problem state when the spu context is disabled. This check could be implemented with a flag added to the spu context that would inhibit mapping problem state pages, and a routine to unmap spu problem state pages. When the spu is enabled with ps3_enable_spu() the flag would be set allowing pages to be mapped, and when the spu is disabled with ps3_disable_spu() the flag would be cleared and mapped problem state pages would be unmapped. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-20[POWERPC] Merge 32 and 64 bits pcibios_enable_deviceBenjamin Herrenschmidt
This merge the two implementations, based on the previously fixed up 32 bits one. The pcibios_enable_device_hook in ppc_md is now available for ppc64 use. Also remove the new unused "initial" parameter from it and fixup users. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-20[POWERPC] Merge PCI resource allocation & assignmentBenjamin Herrenschmidt
The 32 bits PCI code now uses the generic code for assigning unassigned resources and an algorithm similar to x86 for claiming existing ones. This works far better than the 64 bits code which basically can only claim existing ones (pci_probe_only=1) or would fall apart completely. This merges them so that the new 32 bits implementation is used for both. 64 bits now gets the new PCI flags for controlling the behaviour, though the old pci_probe_only global is still there for now to be cleared if you want to. I kept a pcibios_claim_one_bus() function mostly based on the old 64 bits code for use by the DLPAR hotplug. This will have to be cleaned up, thought I hope it will work in the meantime. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-20[POWERPC] Merge PCI resource fixupsBenjamin Herrenschmidt
The PCI code in 32 and 64 bits fixes up resources differently. 32 bits uses a header quirk plus handles bridges in pcibios_fixup_bus() while 64 bits does things in various places depending on whether you are using OF probing, using PCI hotplug, etc... This merges those by basically using the 32 bits approach for both, with various tweaks to make 64 bits work with the new approach. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-20[POWERPC] pci32: Add platform option to enable /proc PCI domainsBenjamin Herrenschmidt
This adds flags the platforms can use to enable domain numbers in /proc/bus/pci. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-20[POWERPC] pci32: Add flags modifying the PCI code behaviourBenjamin Herrenschmidt
This adds to the 32 bits PCI code some flags, replacing the old pci_assign_all_busses global, that allow us to control various aspects of the PCI probing, such as whether to re-assign all resources or not, or to not try to assign anything at all. This also adds the flag x86 already has to avoid ISA alignment on bridges that don't have ISA forwarding enabled (no legacy devices on the top level bus) and sets it for PowerMacs. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-20[POWERPC] include/asm-powerpc/: Spelling fixesjoe@perches.com
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Paul Mackerras <paulus@samba.org>