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path: root/include/asm-sh/cpu-sh3
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2007-07-06sh: Fix timer-tmu build for SH-3.Nobuhiro Iwamatsu
With the TMU register definitions being renamed on SH-4, SH-3 ended up breaking. Update the TSTR define to match the SH-4 convention. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-09sh: dma: use __maybe_unusedDavid Rientjes
There is no such thing as labeling a variable as __attribute__((used)). Since ts_shift is not referenced in inline assembly, we assume that we're simply suppressing a warning here if the variable is declared but unreferenced. Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: David Rientjes <rientjes@google.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07sh: MS7712SE01 board support.Nobuhiro Iwamatsu
Support the SH7712 (SH3-DSP) Solution Engine reference board. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-03-05sh: Revert lazy dcache writeback changes.Paul Mundt
These ended up causing too many problems on older parts, revert for now.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13sh: Lazy dcache writeback optimizations.Paul Mundt
This converts the lazy dcache handling to the model described in Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a bonus, this slightly cuts down on the cache flushing frequency. With that and the PTEA handling out of the way, the update_mmu_cache() implementations can be consolidated, and we no longer have to worry about which configuration the cache is in for the SH7705 case. And finally, explicitly disable the lazy writeback on SMP (SH-4A). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-13[PATCH] Optimize D-cache alias handling on forkRalf Baechle
Virtually index, physically tagged cache architectures can get away without cache flushing when forking. This patch adds a new cache flushing function flush_cache_dup_mm(struct mm_struct *) which for the moment I've implemented to do the same thing on all architectures except on MIPS where it's a no-op. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-03sh: Kill off more dead headers.Paul Mundt
Some old rtc and io headers were left hanging around, kill them off.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Calculate shm alignment at runtime.Paul Mundt
Set the SHM alignment at runtime, based off of probed cache desc. Optimize get_unmapped_area() to only colour align shared mappings. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Add support for SH7706/SH7710/SH7343 CPUs.Paul Mundt
This adds support for the aforementioned CPU subtypes, and cleans up some build issues encountered as a result. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: APM/PM support.Andriy Skulysh
This adds some simple PM stubs and the basic APM interfaces, primarily for use by hp6xx, where the existing userland expects it. Signed-off-by: Andriy Skulysh <askulysh@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Fixup SHMLBA definition for SH7705.Paul Mundt
We need this set to something sensible anywhere were we have an aliasing dcache.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: page table alloc cleanups and page fault optimizations.Paul Mundt
Cleanup of page table allocators, using generic folded PMD and PUD helpers. TLB flushing operations are moved to a more sensible spot. The page fault handler is also optimized slightly, we no longer waste cycles on IRQ disabling for flushing of the page from the ITLB, since we're already under CLI protection by the initial exception handler. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Fixup TMU_TOCR definition for SH7300.Paul Mundt
SH7300 has a different TMU_TOCR, make the TMU code work again. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-02-01[PATCH] sh: Move TRA/EXPEVT/INTEVT definitions for reusePaul Mundt
Currently entry.S is home to these definitions, so we move them somewhere more sensible. IPR IRQ handling depends on being to read from INTEVT. Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-16[PATCH] sh: DMA updatesPaul Mundt
This extends the current SH DMA API somewhat to support a proper virtual channel abstraction, and also works to represent this through the driver model by giving each DMAC its own platform device. There's also a few other minor changes to support a few new CPU subtypes, and make TEI generation for the SH DMAC configurable. Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-16Linux-2.6.12-rc2Linus Torvalds
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!