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2007-07-12x86-64: add symbolic constants for the boot segment selectorsH. Peter Anvin
Add symbolic constants for the segment selectors/GDT slots used by the setup code, for consistency with i386. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12Make struct boot_params a real structure, and remove obsolete fieldsH. Peter Anvin
Make struct boot_params a real structure, and remove the handling of some obsolete fields, in particular hd*_info, which was only used by the ST-506 driver, and likely to be wrong for that driver on any modern BIOS. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12Make definitions for struct e820entry and struct e820map consistentH. Peter Anvin
Make definitions for struct e820entry and struct e820map consistent between i386 and x86-64. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12Use a new CPU feature word to cover features that are spread aroundVenki Pallipadi
Some Intel features are spread around in different CPUID leafs like 0x5, 0x6 and 0xA. Make this feature detection code common across i386 and x86_64. Display Intel Dynamic Acceleration feature in /proc/cpuinfo. This feature will be enabled automatically by current acpi-cpufreq driver. Refer to Intel Software Developer's Manual for more details about the feature. Thanks to hpa (H Peter Anvin) for the making the actual code detecting the scattered features data-driven. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12Clean up struct screen_info (<linux/screen_info.h>)H. Peter Anvin
struct screen_info has unaligned members, it needs to be packed. In the process, fix the naming of some of the members, which don't belong in this structure but are part of it anyway. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12Unify the CPU features vectors between i386 and x86-64H. Peter Anvin
Unify the handling of the CPU features vectors between i386 and x86-64. This also adopts the collapsing of features which are required at compile-time into constant tests from x86-64 to i386. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12include/asm-i386/boot.h: This is <asm/boot.h>, not <linux/boot.h>H. Peter Anvin
include/asm-i386/boot.h incorrectly has the multiple include guards as _LINUX_BOOT_H instead of _ASM_BOOT_H. Fix. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12[MIPS] Don't use genrtc.Ralf Baechle
The only pseudo-legitimate MIPS user of genrtc was a systems that doesn't have an RTC in hardware at all. At this point faking one is a little pointless ...
2007-07-12[MIPS] SMTC: Interrupt mask backstop hackKevin D. Kissell
To support multiple TC microthreads acting as "CPUs" within a VPE, VPE-wide interrupt mask bits must be specially manipulated during interrupt handling. To support legacy drivers and interrupt controller management code, SMTC has a "backstop" to track and if necessary restore the interrupt mask. This has some performance impact on interrupt service overhead. Disable it only if you know what you are doing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12[MIPS] Separate platform_device registration for VR41xx GPIOYoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12[MIPS] separate platform_device registration for VR41xx serial interfaceYoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12[MIPS] Cleanup tlbdebug.hAtsushi Nemoto
Also include tlbdebug.h in dump_tlb.c and r3k_dump_tlb.c. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12[MIPS] Change names of local variables to silence sparse (part 2)Atsushi Nemoto
This patch is an workaround for these sparse warnings: include2/asm/mmu_context.h:172:2: warning: symbol 'flags' shadows an earlier one include2/asm/mmu_context.h:133:16: originally declared here include2/asm/mmu_context.h:232:2: warning: symbol 'flags' shadows an earlier one include2/asm/mmu_context.h:203:16: originally declared here include2/asm/mmu_context.h:277:3: warning: symbol 'flags' shadows an earlier one include2/asm/mmu_context.h:250:16: originally declared here Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12[MIPS] Workaround for a sparse warning in include/asm-mips/io.hAtsushi Nemoto
CKSEG1ADDR() returns unsigned int value on 32bit kernel. Cast it to unsigned long to get rid of this warning: include2/asm/io.h:215:12: warning: cast adds address space to expression (<asn:2>) Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12[ARM] 4474/1: Do not check the PSR_F_BIT in valid_user_regsCatalin Marinas
When running Linux in non-secure mode (on ARM1176 for example), depending on the CP15 secure configuration register, the CPSR.F bit (6) might only be modified from the secure mode. However, the valid_user_regs() function checks for this bit being cleared. With commit a6c61e9d, a SIGSEGV is forced in handle_signal() if the user registers are not considered valid. The patch also ensures that the CPSR.A bit is cleared and the USR mode is set if the CPU does not support the 26bit user mode. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4473/2: Take the HWCAP definitions out of the elf.h fileCatalin Marinas
The patch moves the HWCAP definitions and the extern elf_hwcap declaration to the hwcap.h header file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4451/1: pxa: make dma.c generic and remove cpu specific dma codeEric Miao
Since the number of dma channels varies between pxa25x and pxa27x, it introduces some specific code in dma.c. This patch moves the specific code to pxa25x.c and pxa27x.c and makes dma.c more generic. 1. add pxa_init_dma() for dma initialization, the number of channels are passed in by the argument 2. add a "prio" field to the "struct pxa_dma_channel" for the channel priority, and is initialized in pxa_init_dma() 3. use a general priority comparison with the channels "prio" field so to remove the processor specific pxa_for_each_dma_prio macro, this is not lightning fast as the original one, but it is acceptable as it happens when requesting dma, which is usually not so performance critical Signed-off-by: eric miao <eric.miao@marvell.com> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4440/1: PXA: enable the checking of ICIP2 for IRQsEric Miao
ICIP2 is not examined during IRQ entrance, this patch add the checking if the processor is PXA27x or later, with CoreG bits in CPUID (Core Generation) > 1 Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQSEric Miao
1. define PXA_GPIO_IRQ_BASE to be right after the internal IRQs, and define PXA_GPIO_IRQ_NUM to be 128 for all PXA2xx variants 2. make the code specific to the high IRQ numbers (32..64) to be PXA27x specific 3. add a function pxa_init_irq_high() to initialize the internal high IRQ chip, the invoke of this function could be moved to PXA27x specific initialization code Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4434/1: PXA: remove PXA_IRQ_SKIPEric Miao
1. PXA_IRQ_SKIP is defined to be 7 on PXA25x so that the first IRQ starts from zero. This makes IRQ numbering inconsistent between PXA25x and PXA27x. Remove this macro so that the same IRQ_XXXXX definition has the same value on both PXA25x and PXA27x. 2. make IRQ_SSP3..IRQ_PWRI2C valid only if PXA27x is defined, this avoids unintentional use of these macros on PXA25x Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] pxa: introduce cpu_is_pxaXXX macrosRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] pxa: remove MMC register defines from pxa-regs.hRussell King
pxamci.h redefines the MMC registers differently so they can be used with ioremap. Remove the incompatible definitions from pxa-regs.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] pxa: remove useless pxa_pm_finish() functionRussell King
pxa_pm_finish() does nothing but return zero. The core code does nothing with this return value, and will not try to call the finish method in the pm_ops structure if it is NULL. Therefore, we can remove this useless function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12i2c: New bus driver for the TAOS evaluation modulesJean Delvare
This is a new I2C bus driver for the TAOS evaluation modules. Developped and tested on the TAOS TSL2550 EVM. Signed-off-by: Jean Delvare <khali@linux-fr.org>
2007-07-12i2c-piix4: Add support for the ATI SB700Henry Su
Add the SMBus device ID for ATI SB700. Signed-off-by: Henry Su <Henry.su@amd.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2007-07-12i2c: Fix the i2c_smbus_read_i2c_block_data() prototypeJean Delvare
Let the drivers specify how many bytes they want to read with i2c_smbus_read_i2c_block_data(). So far, the block count was hard-coded to I2C_SMBUS_BLOCK_MAX (32), which did not make much sense. Many driver authors complained about this before, and I believe it's about time to fix it. Right now, authors have to do technically stupid things, such as individual byte reads or full-fledged I2C messaging, to work around the problem. We do not want to encourage that. I even found that some bus drivers (e.g. i2c-amd8111) already implemented I2C block read the "right" way, that is, they didn't follow the old, broken standard. The fact that it was never noticed before just shows how little i2c_smbus_read_i2c_block_data() was used, which isn't that surprising given how broken its prototype was so far. There are some obvious compatiblity considerations: * This changes the i2c_smbus_read_i2c_block_data() prototype. Users outside the kernel tree will notice at compilation time, and will have to update their code. * User-space has access to i2c_smbus_xfer() directly using i2c-dev, so the changed expectations would affect tools such as i2cdump. In order to preserve binary compatibility, we give I2C_SMBUS_I2C_BLOCK_DATA a new numeric value, and define I2C_SMBUS_I2C_BLOCK_BROKEN with the old numeric value. When i2c-dev receives a transaction with the old value, it can convert it to the new format on the fly. Signed-off-by: Jean Delvare <khali@linux-fr.org>
2007-07-12i2c: Fix sparse warning in i2c.hMark M. Hoffman
Kill a sparse warning by un-nesting two container_of() calls. Signed-off-by: Mark M. Hoffman <mhoffman@lightlink.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2007-07-12i2c: Add kernel documentationDavid Brownell
Generate I2C kerneldoc; fix various glitches and add "context" sections to that documentation. Most I2C and SMBus functions still have no kerneldoc. Let me suggest providing kerneldoc for all the i2c_smbus_*() functions as a small and mostly self-contained project for anyone so inclined. :) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2007-07-12[ARM] 4453/1: Fully Decode ARM instruction set state in show_regs() tombstoneGeorge G. Davis
The ARM show_regs() tombstone only partially decodes which ARM ISA was executing at the time a fault occurred displaying either "(T)" for the Thumb case or nothing at all for other cases. This patch therefore explicitly identifies which state the processor is in at the time of a fault: ARM, Thumb, Jazelle or JazelleEE. Signed-off-by: George G. Davis <gdavis@mvista.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4377/1: KS8695: GPIO driverAndrew Victor
Driver to control the GPIO pins on the KS8695 processor. The driver natively supports the Generic GPIO interface. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4426/2: Netgear WG302 v2 and WAG302 v2 supportImre Kaloz
This patch provides support for the Netgear WG302 v2 and WAG302 v2 AccessPoint series. This patch relies on the patch "Gateway 7001 series support" minimally, as they only have UART2 connected. Updated to stay below the 80 char limit in uncompress.h Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Deepak Saxena <dsaxena@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4425/2: Gateway 7001 series supportImre Kaloz
This patch provides support for the Gateway 7001 AccessPoint series. Updated to stay below the 80 char limit in uncompress.h Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Deepak Saxena <dsaxena@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4385/2: ixdp425: NAND supportVladimir Barinov
IXDP425 NAND support (arch specific part). The generic platform driver that is used by ixdp425 platfrom is already in upstream kernel in 2.6.22-rc1. Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com> Signed-off-by: Ruslan Sushko <rsushko@ru.mvista.com> Signed-off-by: Deepak Saxena <dsaxena@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4373/1: i.MX/MX1 GPIO support implementationPavel Pisa
Support for generic input output for MX1 family. The implementation prevents allocation of one pin by two users, but does not store pointer to the user description permanently, because this solution would have bigger memory overhead. The simple way to integrate code with per BSP pins setup and allocation is required else all GPIO registration checking is useless. The function imx_gpio_setup_multiple_pins() can be used for this purpose in future. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4428/1: modify at91 includes to handle non-MMU at91x40 familyGreg Ungerer
Modify the common at91 hardware support to deal with the non-MMU at91x40 family. The base RAM (which is most likely not DRAM) is set to the configured value. Virtual IO device mapping is set to be 1 to 1 with the physical addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4427/1: base Atmel at91x40 architecture definesGreg Ungerer
Base at91x40 architecture support defines. These parts are somewhat simpler than the ARM9 Atmel based parts. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4391/1: make at91 debug unit support optionalGreg Ungerer
The AT91x40 family doesn't have the debug unit like its bigger brothers. But it does have the ID and extension registers (with the bit meanings the same). Reorganize at91_dbgu.h to cater for this. This also affects the load uncompressor, since it outputs to the debug port. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4432/5: davinci: pin mux supportVladimir Barinov
Support pin multiplexing configurations driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com> Acked-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4457/2: davinci: GPIO supportVladimir Barinov
Support GPIO driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov <vbarino@ru.mvista.com> Acked-by: David Brownell <david-b@pacbell.net> Acked-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12[ARM] 4430/1: davinci: clock control supportVladimir Barinov
Support clock control driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12Blackfin arch: Add peripheral io API to gpio header fileSonic Zhang
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12Blackfin arch: set up gpio interrupt IRQ_PJ9 for BF54x ATAPI PATA driverSonic Zhang
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12Blackfin arch: clean up some coding style issuesBryan Wu
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12Blackfin arch: Add Support for Peripheral PortMux and resouce allocationMichael Hennerich
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12Blackfin arch: use PAGE_SIZE when doing aligns rather than hardcoded valuesMike Frysinger
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12Blackfin arch: There is no CDPRIO Bit in the EBIU_AMGCTL Register of BF54x archMichael Hennerich
However there are similar things in the EBIU_DDRQUE Register Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12Blackfin arch: Fix Warning add some defines in BF54x header fileMichael Hennerich
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-11security: Protection for exploiting null dereference using mmapEric Paris
Add a new security check on mmap operations to see if the user is attempting to mmap to low area of the address space. The amount of space protected is indicated by the new proc tunable /proc/sys/vm/mmap_min_addr and defaults to 0, preserving existing behavior. This patch uses a new SELinux security class "memprotect." Policy already contains a number of allow rules like a_t self:process * (unconfined_t being one of them) which mean that putting this check in the process class (its best current fit) would make it useless as all user processes, which we also want to protect against, would be allowed. By taking the memprotect name of the new class it will also make it possible for us to move some of the other memory protect permissions out of 'process' and into the new class next time we bump the policy version number (which I also think is a good future idea) Acked-by: Stephen Smalley <sds@tycho.nsa.gov> Acked-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Eric Paris <eparis@redhat.com> Signed-off-by: James Morris <jmorris@namei.org>
2007-07-11[NET_SCHED]: ematch: module autoloadingPatrick McHardy
Signed-off-by: Patrick McHardy <kaber@trash.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2007-07-11[VLAN]: Fix MAC address handlingPatrick McHardy
The VLAN MAC address handling is broken in multiple ways. When the address differs when setting it, the real device is put in promiscous mode twice, but never taken out again. Additionally it doesn't resync when the real device's address is changed and needlessly puts it in promiscous mode when the vlan device is still down. Fix by moving address handling to vlan_dev_open/vlan_dev_stop and properly deal with address changes in the device notifier. Also switch to dev_unicast_add (which needs the exact same handling). Since the set_mac_address handler is identical to the generic ethernet one with these changes, kill it and use ether_setup(). Signed-off-by: Patrick McHardy <kaber@trash.net> Signed-off-by: David S. Miller <davem@davemloft.net>