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More and more devices feature PLLs and FLLs with the ability to select
between multiple input clocks. In order to better support these devices
a new argument, source, has been added to the set_pll() configuration
API. Using set_clkdiv() is often difficult due to the need to stop the
PLL/FLL before any reconfiguration can be done.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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This also simplifies the code a bit.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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For consistency with 24-bit and 32-bit modes, don't send 16-bit stereo
in one 32-bit transfer. Use 2 slots instead on Zylonite. It should result
in exactly the same behaviour.
Now it is possible to use 16-bit single slot transfers in pxa-ssp, which
are needed for Magician to get two frame clock pulses per sample
(one for each channel).
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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We always run in the first timeslot of one.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The Zylonite supports switching the MCLK for the WM9713 between the
AC97CLK and CLK_POUT outputs of the PXA processor via switch SW15 on
the board. This patch adds support for configuring the system to use
CLK_POUT.
Unfortunately it is not possible to read the state of SW15 from software
so this feature is controlled by a module option 'clk_pout' which should
be set to a non-zero value to enable the use of CLK_POUT.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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As part of the deprecation of snd_soc_device push the registration of
the platform down into the card structure.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Implement support for the Marvell Zylonite PXA3xx reference platform,
supporting standard AC97 stereo and AUX interfaces together with the
auxiliary I2S interface of the WM9713.
The board has two options for the MCLK of the WM9713: either the standard
AC97 system clock can be used or the 13MHz CLK_POUT output of the PXA3xx
can be used, selected via SW15 on the board. Currently only the AC97
system clock is supported by this driver.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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