1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
|
/*
* Support for Celleb io workarounds
*
* (C) Copyright 2006-2007 TOSHIBA CORPORATION
*
* This file is based to arch/powerpc/platform/cell/io-workarounds.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#undef DEBUG
#include <linux/of_device.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/ppc-pci.h>
#include "pci.h"
#define MAX_CELLEB_PCI_BUS 4
void *celleb_dummy_page_va;
static struct celleb_pci_bus {
struct pci_controller *phb;
void (*dummy_read)(struct pci_controller *);
} celleb_pci_busses[MAX_CELLEB_PCI_BUS];
static int celleb_pci_count = 0;
static struct celleb_pci_bus *celleb_pci_find(unsigned long vaddr,
unsigned long paddr)
{
int i, j;
struct resource *res;
for (i = 0; i < celleb_pci_count; i++) {
struct celleb_pci_bus *bus = &celleb_pci_busses[i];
struct pci_controller *phb = bus->phb;
if (paddr)
for (j = 0; j < 3; j++) {
res = &phb->mem_resources[j];
if (paddr >= res->start && paddr <= res->end)
return bus;
}
res = &phb->io_resource;
if (vaddr && vaddr >= res->start && vaddr <= res->end)
return bus;
}
return NULL;
}
static void celleb_io_flush(const PCI_IO_ADDR addr)
{
struct celleb_pci_bus *bus;
int token;
token = PCI_GET_ADDR_TOKEN(addr);
if (token && token <= celleb_pci_count)
bus = &celleb_pci_busses[token - 1];
else {
unsigned long vaddr, paddr;
pte_t *ptep;
vaddr = (unsigned long)PCI_FIX_ADDR(addr);
if (vaddr < PHB_IO_BASE || vaddr >= PHB_IO_END)
return;
ptep = find_linux_pte(init_mm.pgd, vaddr);
if (ptep == NULL)
paddr = 0;
else
paddr = pte_pfn(*ptep) << PAGE_SHIFT;
bus = celleb_pci_find(vaddr, paddr);
if (bus == NULL)
return;
}
if (bus->dummy_read)
bus->dummy_read(bus->phb);
}
static u8 celleb_readb(const PCI_IO_ADDR addr)
{
u8 val;
val = __do_readb(addr);
celleb_io_flush(addr);
return val;
}
static u16 celleb_readw(const PCI_IO_ADDR addr)
{
u16 val;
val = __do_readw(addr);
celleb_io_flush(addr);
return val;
}
static u32 celleb_readl(const PCI_IO_ADDR addr)
{
u32 val;
val = __do_readl(addr);
celleb_io_flush(addr);
return val;
}
static u64 celleb_readq(const PCI_IO_ADDR addr)
{
u64 val;
val = __do_readq(addr);
celleb_io_flush(addr);
return val;
}
static u16 celleb_readw_be(const PCI_IO_ADDR addr)
{
u16 val;
val = __do_readw_be(addr);
celleb_io_flush(addr);
return val;
}
static u32 celleb_readl_be(const PCI_IO_ADDR addr)
{
u32 val;
val = __do_readl_be(addr);
celleb_io_flush(addr);
return val;
}
static u64 celleb_readq_be(const PCI_IO_ADDR addr)
{
u64 val;
val = __do_readq_be(addr);
celleb_io_flush(addr);
return val;
}
static void celleb_readsb(const PCI_IO_ADDR addr,
void *buf, unsigned long count)
{
__do_readsb(addr, buf, count);
celleb_io_flush(addr);
}
static void celleb_readsw(const PCI_IO_ADDR addr,
void *buf, unsigned long count)
{
__do_readsw(addr, buf, count);
celleb_io_flush(addr);
}
static void celleb_readsl(const PCI_IO_ADDR addr,
void *buf, unsigned long count)
{
__do_readsl(addr, buf, count);
celleb_io_flush(addr);
}
static void celleb_memcpy_fromio(void *dest,
const PCI_IO_ADDR src,
unsigned long n)
{
__do_memcpy_fromio(dest, src, n);
celleb_io_flush(src);
}
static void __iomem *celleb_ioremap(unsigned long addr,
unsigned long size,
unsigned long flags)
{
struct celleb_pci_bus *bus;
void __iomem *res = __ioremap(addr, size, flags);
int busno;
bus = celleb_pci_find(0, addr);
if (bus != NULL) {
busno = bus - celleb_pci_busses;
PCI_SET_ADDR_TOKEN(res, busno + 1);
}
return res;
}
static void celleb_iounmap(volatile void __iomem *addr)
{
return __iounmap(PCI_FIX_ADDR(addr));
}
static struct ppc_pci_io celleb_pci_io __initdata = {
.readb = celleb_readb,
.readw = celleb_readw,
.readl = celleb_readl,
.readq = celleb_readq,
.readw_be = celleb_readw_be,
.readl_be = celleb_readl_be,
.readq_be = celleb_readq_be,
.readsb = celleb_readsb,
.readsw = celleb_readsw,
.readsl = celleb_readsl,
.memcpy_fromio = celleb_memcpy_fromio,
};
void __init celleb_pci_add_one(struct pci_controller *phb,
void (*dummy_read)(struct pci_controller *))
{
struct celleb_pci_bus *bus = &celleb_pci_busses[celleb_pci_count];
struct device_node *np = phb->arch_data;
if (celleb_pci_count >= MAX_CELLEB_PCI_BUS) {
printk(KERN_ERR "Too many pci bridges, workarounds"
" disabled for %s\n", np->full_name);
return;
}
celleb_pci_count++;
bus->phb = phb;
bus->dummy_read = dummy_read;
}
static struct of_device_id celleb_pci_workaround_match[] __initdata = {
{
.name = "pci-pseudo",
.data = fake_pci_workaround_init,
}, {
.name = "epci",
.data = epci_workaround_init,
}, {
},
};
int __init celleb_pci_workaround_init(void)
{
struct pci_controller *phb;
struct device_node *node;
const struct of_device_id *match;
void (*init_func)(struct pci_controller *);
celleb_dummy_page_va = kmalloc(PAGE_SIZE, GFP_KERNEL);
if (!celleb_dummy_page_va) {
printk(KERN_ERR "Celleb: dummy read disabled. "
"Alloc celleb_dummy_page_va failed\n");
return 1;
}
list_for_each_entry(phb, &hose_list, list_node) {
node = phb->arch_data;
match = of_match_node(celleb_pci_workaround_match, node);
if (match) {
init_func = match->data;
(*init_func)(phb);
}
}
ppc_pci_io = celleb_pci_io;
ppc_md.ioremap = celleb_ioremap;
ppc_md.iounmap = celleb_iounmap;
return 0;
}
|