aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorBen Skeggs <skeggsb@gmail.com>2007-06-28 21:01:17 +1000
committerBen Skeggs <skeggsb@gmail.com>2007-06-28 21:01:17 +1000
commit1c32fecd6d2286af075976167c4887b9096e8312 (patch)
tree0729e94db22509da56c3082cb988026e5efa9100
parent2dd85772aa4e134730f294d77b4ff030a175a4ab (diff)
nouveau: Hack around possible Xv blit adaptor breakage
-rw-r--r--shared-core/nouveau_fifo.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c
index f179af63..81dbfcda 100644
--- a/shared-core/nouveau_fifo.c
+++ b/shared-core/nouveau_fifo.c
@@ -341,6 +341,19 @@ int nouveau_fifo_alloc(drm_device_t* dev, int *chan_ret, DRMFILE filp,
nouveau_fifo_free(dev, channel);
return ret;
}
+
+ /* Temporary hack, to avoid breaking Xv on cards where the
+ * initial context value for 0x400710 doesn't have these bits
+ * set. Proper fix would be to find which object+method is
+ * responsible for modifying this state.
+ */
+ if (dev_priv->chipset >= 0x10) {
+ uint32_t tmp;
+ tmp = NV_READ(NV10_PGRAPH_SURFACE) & 0x0007ff00;
+ NV_WRITE(NV10_PGRAPH_SURFACE, tmp);
+ tmp = NV_READ(NV10_PGRAPH_SURFACE) | 0x00020100;
+ NV_WRITE(NV10_PGRAPH_SURFACE, tmp);
+ }
}
NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH, 0x00000001);