diff options
| author | Ian Romanick <idr@us.ibm.com> | 2007-10-03 14:08:18 -0700 |
|---|---|---|
| committer | Ian Romanick <idr@us.ibm.com> | 2007-10-03 14:08:29 -0700 |
| commit | 7f99fd5d7aa1f0d2463907d9d8c483b6249ac831 (patch) | |
| tree | f372e9e5782f2d39189b9df84f9858efaa17ff81 /linux-core/xgi_pcie.c | |
| parent | a72eb27fbc7a66e35018ffbcb5137cfaaf4049aa (diff) | |
First round of byte-ordering fixes for PowerPC.
This isn't 100% as command submission via PCI-e GART buffers doesn't work.
I've hacked around that for the time being. This is essentially the code
that was used at the POWER.org event to show Bimini.
Diffstat (limited to 'linux-core/xgi_pcie.c')
| -rw-r--r-- | linux-core/xgi_pcie.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/linux-core/xgi_pcie.c b/linux-core/xgi_pcie.c index a7d3ea24..4becf35b 100644 --- a/linux-core/xgi_pcie.c +++ b/linux-core/xgi_pcie.c @@ -40,7 +40,8 @@ void xgi_gart_flush(struct drm_device *dev) DRM_WRITE8(info->mmio_map, 0xB00C, temp & ~0x02); /* Set GART base address to HW */ - DRM_WRITE32(info->mmio_map, 0xB034, info->gart_info.bus_addr); + DRM_WRITE32(info->mmio_map, 0xB034, + cpu_to_le32(info->gart_info.bus_addr)); /* Flush GART table. */ DRM_WRITE8(info->mmio_map, 0xB03F, 0x40); |