diff options
| author | Stuart Bennett <sb476@cam.ac.uk> | 2008-01-03 16:57:55 +0000 |
|---|---|---|
| committer | Stephane Marchesin <marchesin@icps.u-strasbg.fr> | 2008-01-04 05:08:15 +0100 |
| commit | 71adbfc874517efbba8b9f7c3f90baad0d7fb707 (patch) | |
| tree | 87d2d6c439bd97ec274974ba23a8f1a4eddd5db1 /shared-core/nv04_mc.c | |
| parent | 381724a35b662302b70f9a5c04f1412ff2c2ad5b (diff) | |
[PATCH] nouveau: reset AGP on init for < nv40
This is necessary for AGP to work after running bios init scripts on nv3x, and
is seen in mmio traces of all cards (nv04-nv4x)
I'm not making the equivalent change to nv40_mc.c, as early cards (6200, 6800gt)
use the 0x000018XX PBUS and later cards use the 0x000880XX PBUS and I don't know
the effects of using the wrong one
Diffstat (limited to 'shared-core/nv04_mc.c')
| -rw-r--r-- | shared-core/nv04_mc.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/shared-core/nv04_mc.c b/shared-core/nv04_mc.c index 24c1f7b3..a6a2045d 100644 --- a/shared-core/nv04_mc.c +++ b/shared-core/nv04_mc.c @@ -7,12 +7,25 @@ int nv04_mc_init(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; + uint32_t saved_pci_nv_1, saved_pci_nv_19; + + saved_pci_nv_1 = NV_READ(NV04_PBUS_PCI_NV_1); + saved_pci_nv_19 = NV_READ(NV04_PBUS_PCI_NV_19); + + /* clear busmaster bit */ + NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1 & ~(0x00000001 << 2)); + /* clear SBA, AGP and FW bits */ + NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19 & 0xfffff00f); /* Power up everything, resetting each individual unit will * be done later if needed. */ NV_WRITE(NV03_PMC_ENABLE, 0xFFFFFFFF); + /* and restore (gives effect of resetting AGP) */ + NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19); + NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1); + return 0; } |