Revert "Merge branch 'modesetting-gem'"

This reverts commit 6656db10551bbb8770dd945b6d81d5138521f208.

We really just want the libdrm and ioctl bits, not all the driver
stuff.

1 files changed, 0 insertions, 148 deletions

diff --git a/shared-core/radeon_drm.h b/shared-core/radeon_drm.h
index 002e4004..ffaa46e4 100644
--- a/shared-core/radeon_drm.h
+++ b/shared-core/radeon_drm.h
@@ -453,18 +453,8 @@ typedef struct {
 	int pfCurrentPage;	/* which buffer is being displayed? */
 	int crtc2_base;		/* CRTC2 frame offset */
 	int tiling_enabled;	/* set by drm, read by 2d + 3d clients */
-
-	unsigned int last_fence;
-
-	uint32_t front_handle;
-	uint32_t back_handle;
-	uint32_t depth_handle;
-	uint32_t front_pitch;
-	uint32_t back_pitch;
-	uint32_t depth_pitch;
 } drm_radeon_sarea_t;
 
-
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (xf86drmRadeon.h)
  *
@@ -503,19 +493,6 @@ typedef struct {
 #define DRM_RADEON_SURF_ALLOC 0x1a
 #define DRM_RADEON_SURF_FREE  0x1b
 
-#define DRM_RADEON_GEM_INFO   0x1c
-#define DRM_RADEON_GEM_CREATE 0x1d
-#define DRM_RADEON_GEM_MMAP   0x1e
-#define DRM_RADEON_GEM_PIN    0x1f
-#define DRM_RADEON_GEM_UNPIN  0x20
-#define DRM_RADEON_GEM_PREAD  0x21
-#define DRM_RADEON_GEM_PWRITE 0x22
-#define DRM_RADEON_GEM_SET_DOMAIN 0x23
-#define DRM_RADEON_GEM_WAIT_RENDERING 0x24
-
-#define DRM_RADEON_CS           0x25
-#define DRM_RADEON_CS2       0x26
-
 #define DRM_IOCTL_RADEON_CP_INIT    DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
 #define DRM_IOCTL_RADEON_CP_START   DRM_IO(  DRM_COMMAND_BASE + DRM_RADEON_CP_START)
 #define DRM_IOCTL_RADEON_CP_STOP    DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_STOP, drm_radeon_cp_stop_t)
@@ -544,19 +521,6 @@ typedef struct {
 #define DRM_IOCTL_RADEON_SURF_ALLOC DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_ALLOC, drm_radeon_surface_alloc_t)
 #define DRM_IOCTL_RADEON_SURF_FREE  DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_FREE, drm_radeon_surface_free_t)
 
-#define DRM_IOCTL_RADEON_GEM_INFO   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_INFO, struct drm_radeon_gem_info)
-#define DRM_IOCTL_RADEON_GEM_CREATE   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_CREATE, struct drm_radeon_gem_create)
-#define DRM_IOCTL_RADEON_GEM_MMAP   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_MMAP, struct drm_radeon_gem_mmap)
-#define DRM_IOCTL_RADEON_GEM_PIN   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PIN, struct drm_radeon_gem_pin)
-#define DRM_IOCTL_RADEON_GEM_UNPIN   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_UNPIN, struct drm_radeon_gem_unpin)
-#define DRM_IOCTL_RADEON_GEM_PREAD   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PREAD, struct drm_radeon_gem_pread)
-#define DRM_IOCTL_RADEON_GEM_PWRITE   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PWRITE, struct drm_radeon_gem_pwrite)
-#define DRM_IOCTL_RADEON_GEM_SET_DOMAIN  DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_DOMAIN, struct drm_radeon_gem_set_domain)
-#define DRM_IOCTL_RADEON_GEM_WAIT_RENDERING DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_RENDERING, struct drm_radeon_gem_wait_rendering) 
-#define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs)
-#define DRM_IOCTL_RADEON_CS2 DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS2, struct drm_radeon_cs2)
-
-
 typedef struct drm_radeon_init {
 	enum {
 		RADEON_INIT_CP = 0x01,
@@ -713,7 +677,6 @@ typedef struct drm_radeon_indirect {
 #define RADEON_PARAM_VBLANK_CRTC           13   /* VBLANK CRTC */
 #define RADEON_PARAM_FB_LOCATION           14   /* FB location */
 #define RADEON_PARAM_NUM_GB_PIPES          15   /* num GB pipes */
-#define RADEON_PARAM_KERNEL_MM             16
 
 typedef struct drm_radeon_getparam {
 	int param;
@@ -769,7 +732,6 @@ typedef struct drm_radeon_setparam {
 #define RADEON_SETPARAM_NEW_MEMMAP 4		/* Use new memory map */
 #define RADEON_SETPARAM_PCIGART_TABLE_SIZE 5    /* PCI GART Table Size */
 #define RADEON_SETPARAM_VBLANK_CRTC 6           /* VBLANK CRTC */
-#define RADEON_SETPARAM_MM_INIT 7		/* Initialise the mm */
 /* 1.14: Clients can allocate/free a surface
  */
 typedef struct drm_radeon_surface_alloc {
@@ -785,114 +747,4 @@ typedef struct drm_radeon_surface_free {
 #define	DRM_RADEON_VBLANK_CRTC1		1
 #define	DRM_RADEON_VBLANK_CRTC2		2
 
-#define RADEON_GEM_DOMAIN_CPU 0x1   // Cached CPU domain
-#define RADEON_GEM_DOMAIN_GTT 0x2   // GTT or cache flushed
-#define RADEON_GEM_DOMAIN_VRAM 0x4  // VRAM domain
-
-/* return to userspace start/size of gtt and vram apertures */
-struct drm_radeon_gem_info {
-	uint64_t gart_start;
-	uint64_t gart_size;
-	uint64_t vram_start;
-	uint64_t vram_size;
-	uint64_t vram_visible;
-};
-
-struct drm_radeon_gem_create {
-	uint64_t size;
-	uint64_t alignment;
-	uint32_t handle;
-	uint32_t initial_domain; // to allow VRAM to be created
-	uint32_t no_backing_store; // for VRAM objects - select whether they need backing store
-	// pretty much front/back/depth don't need it - other things do
-};
-
-struct drm_radeon_gem_mmap {
-	uint32_t handle;
-	uint32_t pad;
-	uint64_t offset;
-	uint64_t size;
-	uint64_t addr_ptr;
-};
-
-struct drm_radeon_gem_set_domain {
-	uint32_t handle;
-	uint32_t read_domains;
-	uint32_t write_domain;
-};
-
-struct drm_radeon_gem_wait_rendering {
-	uint32_t handle;
-};
-
-struct drm_radeon_gem_pin {
-	uint32_t handle;
-	uint32_t pin_domain;
-	uint64_t alignment;
-	uint64_t offset;
-};
-
-struct drm_radeon_gem_unpin {
-	uint32_t handle;
-	uint32_t pad;
-};
-
-struct drm_radeon_gem_busy {
-	uint32_t handle;
-	uint32_t busy;
-};
-
-struct drm_radeon_gem_pread {
-	/** Handle for the object being read. */
-	uint32_t handle;
-	uint32_t pad;
-	/** Offset into the object to read from */
-	uint64_t offset;
-	/** Length of data to read */
-	uint64_t size;
-	/** Pointer to write the data into. */
-	uint64_t data_ptr;	/* void *, but pointers are not 32/64 compatible */
-};
-
-struct drm_radeon_gem_pwrite {
-	/** Handle for the object being written to. */
-	uint32_t handle;
-	uint32_t pad;
-	/** Offset into the object to write to */
-	uint64_t offset;
-	/** Length of data to write */
-	uint64_t size;
-	/** Pointer to read the data from. */
-	uint64_t data_ptr;	/* void *, but pointers are not 32/64 compatible */
-};
-
-
-/* New interface which obsolete all previous interface.
- */
-
-
-struct drm_radeon_cs {
-	uint32_t            dwords;
-	uint32_t            cs_id;
-	uint64_t            packets;
-};
-
-#define RADEON_CHUNK_ID_RELOCS 0x01
-#define RADEON_CHUNK_ID_IB     0x02
-#define RADEON_CHUNK_ID_OLD 0xff
-
-struct drm_radeon_cs_chunk {
-	uint32_t chunk_id;
-	uint32_t length_dw;
-	uint64_t chunk_data;
-};
-
-struct drm_radeon_cs2 {
-	uint32_t	num_chunks;
-	uint32_t        cs_id;
-	uint64_t	chunks; /* this points to uint64_t * which point to
-				   cs chunks */
-};
-
-
 #endif