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-rw-r--r--shared-core/i915_dma.c5
-rw-r--r--shared-core/r128_state.c28
-rw-r--r--shared-core/radeon_cp.c9
-rw-r--r--shared-core/radeon_drv.h4
-rw-r--r--shared-core/radeon_state.c64
5 files changed, 105 insertions, 5 deletions
diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c
index 9007bd2c..1c524968 100644
--- a/shared-core/i915_dma.c
+++ b/shared-core/i915_dma.c
@@ -96,8 +96,7 @@ int i915_dma_cleanup(drm_device_t * dev)
if (dev_priv->hw_status_page) {
#ifdef __FreeBSD__
#if __FreeBSD_version > 500000
- contigfree(dev_priv->hw_status_page, PAGE_SIZE,
- drm_M_DRM);
+ contigfree(dev_priv->hw_status_page, PAGE_SIZE, M_DRM);
#endif
#else
pci_free_consistent(dev->pdev, PAGE_SIZE,
@@ -182,7 +181,7 @@ static int i915_initialize(drm_device_t * dev,
/* Program Hardware Status Page */
#ifdef __FreeBSD__
dev_priv->hw_status_page =
- contigmalloc(PAGE_SIZE, drm_M_DRM, M_NOWAIT, 0ul, 0, 0, 0);
+ contigmalloc(PAGE_SIZE, M_DRM, M_NOWAIT, 0ul, 0, 0, 0);
dev_priv->dma_status_page = vtophys(dev_priv->hw_status_page);
#else
dev_priv->hw_status_page =
diff --git a/shared-core/r128_state.c b/shared-core/r128_state.c
index 155fe936..adf78c3a 100644
--- a/shared-core/r128_state.c
+++ b/shared-core/r128_state.c
@@ -32,6 +32,34 @@
#include "r128_drm.h"
#include "r128_drv.h"
+/* Interface history:
+ *
+ * ?? - ??
+ * 2.4 - Add support for ycbcr textures (no new ioctls)
+ * 2.5 - Add FLIP ioctl, disable FULLSCREEN.
+ */
+static drm_ioctl_desc_t r128_ioctls[] = {
+ [DRM_IOCTL_NR(DRM_R128_INIT)] = {r128_cce_init, 1, 1},
+ [DRM_IOCTL_NR(DRM_R128_CCE_START)] = {r128_cce_start, 1, 1},
+ [DRM_IOCTL_NR(DRM_R128_CCE_STOP)] = {r128_cce_stop, 1, 1},
+ [DRM_IOCTL_NR(DRM_R128_CCE_RESET)] = {r128_cce_reset, 1, 1},
+ [DRM_IOCTL_NR(DRM_R128_CCE_IDLE)] = {r128_cce_idle, 1, 0},
+ [DRM_IOCTL_NR(DRM_R128_RESET)] = {r128_engine_reset, 1, 0},
+ [DRM_IOCTL_NR(DRM_R128_FULLSCREEN)] = {r128_fullscreen, 1, 0},
+ [DRM_IOCTL_NR(DRM_R128_SWAP)] = {r128_cce_swap, 1, 0},
+ [DRM_IOCTL_NR(DRM_R128_FLIP)] = {r128_cce_flip, 1, 0},
+ [DRM_IOCTL_NR(DRM_R128_CLEAR)] = {r128_cce_clear, 1, 0},
+ [DRM_IOCTL_NR(DRM_R128_VERTEX)] = {r128_cce_vertex, 1, 0},
+ [DRM_IOCTL_NR(DRM_R128_INDICES)] = {r128_cce_indices, 1, 0},
+ [DRM_IOCTL_NR(DRM_R128_BLIT)] = {r128_cce_blit, 1, 0},
+ [DRM_IOCTL_NR(DRM_R128_DEPTH)] = {r128_cce_depth, 1, 0},
+ [DRM_IOCTL_NR(DRM_R128_STIPPLE)] = {r128_cce_stipple, 1, 0},
+ [DRM_IOCTL_NR(DRM_R128_INDIRECT)] = {r128_cce_indirect, 1, 1},
+ [DRM_IOCTL_NR(DRM_R128_GETPARAM)] = {r128_getparam, 1, 0},
+};
+
+int r128_max_ioctl = DRM_ARRAY_SIZE(r128_ioctls);
+
/* ================================================================
* CCE hardware state programming functions
*/
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c
index 96e6d65e..ea061ebc 100644
--- a/shared-core/radeon_cp.c
+++ b/shared-core/radeon_cp.c
@@ -2007,6 +2007,7 @@ int radeon_preinit(struct drm_device *dev, unsigned long flags)
dev->dev_private = (void *)dev_priv;
dev_priv->flags = flags;
+#ifdef __linux__
/* registers */
if ((ret = drm_initmap(dev, pci_resource_start(dev->pdev, 2),
pci_resource_len(dev->pdev, 2), _DRM_REGISTERS,
@@ -2029,19 +2030,23 @@ int radeon_preinit(struct drm_device *dev, unsigned long flags)
pci_write_config_dword(dev->pdev, RADEON_AGP_COMMAND_PCI_CONFIG,
save | RADEON_AGP_ENABLE);
pci_read_config_dword(dev->pdev, RADEON_AGP_COMMAND_PCI_CONFIG, &temp);
+ pci_write_config_dword(dev->pdev, RADEON_AGP_COMMAND_PCI_CONFIG, save);
if (temp & RADEON_AGP_ENABLE)
dev_priv->flags |= CHIP_IS_AGP;
+#else
+ if (drm_device_is_agp(dev))
+ dev_priv->flags & CHIP_IS_AGP;
+#endif
DRM_DEBUG("%s card detected\n",
((dev_priv->flags & CHIP_IS_AGP) ? "AGP" : "PCI"));
- pci_write_config_dword(dev->pdev, RADEON_AGP_COMMAND_PCI_CONFIG, save);
+#if defined(__linux__)
/* Check if we need a reset */
if (!
(dev_priv->mmio =
drm_core_findmap(dev, pci_resource_start(dev->pdev, 2))))
return DRM_ERR(ENOMEM);
-#if defined(__linux__)
ret = radeon_create_i2c_busses(dev);
#endif
return ret;
diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h
index 3c7a6fe1..b62580e9 100644
--- a/shared-core/radeon_drv.h
+++ b/shared-core/radeon_drv.h
@@ -103,9 +103,11 @@ enum radeon_cp_microcode_version {
UCODE_R300,
};
+#ifdef __linux__
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
#include "radeon_i2c.h"
#endif
+#endif /* __linux__ */
/*
* Chip flags
@@ -240,9 +242,11 @@ typedef struct drm_radeon_private {
/* starting from here on, data is preserved accross an open */
uint32_t flags; /* see radeon_chip_flags */
+#ifdef __linux__
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
struct radeon_i2c_chan i2c[4];
#endif
+#endif /* __linux__ */
} drm_radeon_private_t;
typedef struct drm_radeon_buf_priv {
diff --git a/shared-core/radeon_state.c b/shared-core/radeon_state.c
index 1b694304..ec85efac 100644
--- a/shared-core/radeon_state.c
+++ b/shared-core/radeon_state.c
@@ -33,6 +33,70 @@
#include "radeon_drm.h"
#include "radeon_drv.h"
+/* Interface history:
+ *
+ * 1.1 - ??
+ * 1.2 - Add vertex2 ioctl (keith)
+ * - Add stencil capability to clear ioctl (gareth, keith)
+ * - Increase MAX_TEXTURE_LEVELS (brian)
+ * 1.3 - Add cmdbuf ioctl (keith)
+ * - Add support for new radeon packets (keith)
+ * - Add getparam ioctl (keith)
+ * - Add flip-buffers ioctl, deprecate fullscreen foo (keith).
+ * 1.4 - Add scratch registers to get_param ioctl.
+ * 1.5 - Add r200 packets to cmdbuf ioctl
+ * - Add r200 function to init ioctl
+ * - Add 'scalar2' instruction to cmdbuf
+ * 1.6 - Add static GART memory manager
+ * Add irq handler (won't be turned on unless X server knows to)
+ * Add irq ioctls and irq_active getparam.
+ * Add wait command for cmdbuf ioctl
+ * Add GART offset query for getparam
+ * 1.7 - Add support for cube map registers: R200_PP_CUBIC_FACES_[0..5]
+ * and R200_PP_CUBIC_OFFSET_F1_[0..5].
+ * Added packets R200_EMIT_PP_CUBIC_FACES_[0..5] and
+ * R200_EMIT_PP_CUBIC_OFFSETS_[0..5]. (brian)
+ * 1.8 - Remove need to call cleanup ioctls on last client exit (keith)
+ * Add 'GET' queries for starting additional clients on different VT's.
+ * 1.9 - Add DRM_IOCTL_RADEON_CP_RESUME ioctl.
+ * Add texture rectangle support for r100.
+ * 1.10- Add SETPARAM ioctl; first parameter to set is FB_LOCATION, which
+ * clients use to tell the DRM where they think the framebuffer is
+ * located in the card's address space
+ * 1.11- Add packet R200_EMIT_RB3D_BLENDCOLOR to support GL_EXT_blend_color
+ * and GL_EXT_blend_[func|equation]_separate on r200
+ */
+drm_ioctl_desc_t radeon_ioctls[] = {
+ [DRM_IOCTL_NR(DRM_RADEON_CP_INIT)] = {radeon_cp_init, 1, 1},
+ [DRM_IOCTL_NR(DRM_RADEON_CP_START)] = {radeon_cp_start, 1, 1},
+ [DRM_IOCTL_NR(DRM_RADEON_CP_STOP)] = {radeon_cp_stop, 1, 1},
+ [DRM_IOCTL_NR(DRM_RADEON_CP_RESET)] = {radeon_cp_reset, 1, 1},
+ [DRM_IOCTL_NR(DRM_RADEON_CP_IDLE)] = {radeon_cp_idle, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_CP_RESUME)] = {radeon_cp_resume, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_RESET)] = {radeon_engine_reset, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_FULLSCREEN)] = {radeon_fullscreen, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_SWAP)] = {radeon_cp_swap, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_CLEAR)] = {radeon_cp_clear, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_VERTEX)] = {radeon_cp_vertex, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_INDICES)] = {radeon_cp_indices, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_TEXTURE)] = {radeon_cp_texture, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_STIPPLE)] = {radeon_cp_stipple, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_INDIRECT)] = {radeon_cp_indirect, 1, 1},
+ [DRM_IOCTL_NR(DRM_RADEON_VERTEX2)] = {radeon_cp_vertex2, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_CMDBUF)] = {radeon_cp_cmdbuf, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_GETPARAM)] = {radeon_cp_getparam, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_FLIP)] = {radeon_cp_flip, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_ALLOC)] = {radeon_mem_alloc, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_FREE)] = {radeon_mem_free, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_INIT_HEAP)] = {radeon_mem_init_heap, 1, 1},
+ [DRM_IOCTL_NR(DRM_RADEON_IRQ_EMIT)] = {radeon_irq_emit, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_IRQ_WAIT)] = {radeon_irq_wait, 1, 0},
+ [DRM_IOCTL_NR(DRM_RADEON_SETPARAM)] = {radeon_cp_setparam, 1, 0}
+};
+
+int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls);
+
+
/* ================================================================
* Helper functions for client state checking and fixup
*/
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-22 23:54:29 +0000